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Added photo of setup.
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Nick Gammon
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Do you have an actual photograph of this?

I've pulled it all apart days ago, however thankfully I took a snapshot before I did.

Photo of schematic

To be honest, the schematic is easier to follow. When looking at photos it can be hard to see exactly what is plugged into where.


Do you have an actual photograph of this?

I've pulled it all apart days ago, however thankfully I took a snapshot before I did.

Photo of schematic

To be honest, the schematic is easier to follow. When looking at photos it can be hard to see exactly what is plugged into where.

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Fixed typo.
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Nick Gammon
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Thus you need soto supply the clock board with 5V, and use a bi-directional logic-level converter, such as this (using two logic-level MOSFETs):

Thus you need so supply the clock board with 5V, and use a bi-directional logic-level converter, such as this (using two logic-level MOSFETs):

Thus you need to supply the clock board with 5V, and use a bi-directional logic-level converter, such as this (using two logic-level MOSFETs):

Explained how level converter works.
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Nick Gammon
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How the level converter works

For more information, read the Philips Application Note AN97055

In brief (taking SDA as an example):

  • If neither side is driving SDA low, then VGS is zero (they are both 3.3V) and the MOSFET does not conduct. Hence each side is "pulled-up" to their respective voltages. The low side is pulled up to 3.3V and the high side is pulled up to 5V.

  • If the low side drives SDA low, then VGS is 3.3V which is high enough for the MOSFET to conduct. Since it conducts it also drags the high side low as well (overpowering the 10k pull-up resistor).

  • If the high side drives SDA low, current initially flows through the drain substrate diode of the MOSFET (it will be a diode drop above 0V, namely 0.7V), lowering the voltage at the source, until VGS is high enough for the MOSFET to conduct. Once it starts conducting then the low side is pulled further lower.


How the level converter works

For more information, read the Philips Application Note AN97055

In brief (taking SDA as an example):

  • If neither side is driving SDA low, then VGS is zero (they are both 3.3V) and the MOSFET does not conduct. Hence each side is "pulled-up" to their respective voltages. The low side is pulled up to 3.3V and the high side is pulled up to 5V.

  • If the low side drives SDA low, then VGS is 3.3V which is high enough for the MOSFET to conduct. Since it conducts it also drags the high side low as well (overpowering the 10k pull-up resistor).

  • If the high side drives SDA low, current initially flows through the drain substrate diode of the MOSFET (it will be a diode drop above 0V, namely 0.7V), lowering the voltage at the source, until VGS is high enough for the MOSFET to conduct. Once it starts conducting then the low side is pulled further lower.

Improved schematic.
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Nick Gammon
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Added I2C scanner code.
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Nick Gammon
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Nick Gammon
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  • 70
  • 126
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