Timeline for answer to Ultra low inductance trace - disadvantages? by Andy aka
Current License: CC BY-SA 4.0
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| when toggle format | what | by | license | comment | |
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| Oct 12, 2023 at 16:59 | comment | added | Andy aka | @TimWilliams please do not use loose terms like Vgs(on) as they often confuse people and leave them scratching their heads as to whether you are making a semi-veiled criticism or, contributing (even if obscure) to the answer. Regarding your 367 pF number, that only equates when the gate drive is 6 volts and, is not the equivalent capacitance when the beginning of the plateau is reached (as per the JESD24-2 standard). That would be more like 170 pF. No need to reply to this comment because its not relevant to the question. | |
| Oct 12, 2023 at 11:56 | comment | added | Tim Williams | And 367pF effective Ciss (Qg / Vgs(on)), for that matter! | |
| Oct 12, 2023 at 11:48 | history | edited | Andy aka | CC BY-SA 4.0 |
added 578 characters in body
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| Oct 12, 2023 at 8:32 | history | answered | Andy aka | CC BY-SA 4.0 |