Timeline for answer to How to design a circuit that outputs the binary position of the 3rd set bit from the right in an 8-bit input? by TonyM
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| Sep 25, 2025 at 20:52 | comment | added | TonyM | @periblepsis, it's better if I reply to OP comments to me myself. Since this is most likely a homework question, I provided an answer that gives guidance to a solution, putting the OP's education above enjoying myself rattling off a schematic . You instead chose to spell out a whole circuit, apparently failing to recognise and satisfy the point of the exercise. But in a circuit they can't build. Anyway, you can discuss your answer in comments on it there instead. | |
| Sep 25, 2025 at 20:38 | comment | added | Fourier_Asker | @periblepsis God lord, this is making me afraid, I was expected to do this? OMG I think I will try to understand it tommorow (its 23:38 to me right now), it seems huge Thanks!! | |
| Sep 25, 2025 at 17:48 | comment | added | periblepsis | @Fourier_Asker This is probably what TonyM is hand-waving towards. He fails to provide some important details, such as demuxes, how the masking gets done, and the required 3-bit inverter at the last output and some other logic. But, broadly speaking, he is pointing in a direction that works. What I show there does exactly what you asked via TonyM's direction and using combinatorial/combinational logic. It produces a 000 if there aren't enough bits set, too. | |
| Sep 25, 2025 at 12:12 | comment | added | Mattman944 | This! Any sequential logic circuit will take longer to get the answer. And handles changes to the input much better. | |
| Sep 25, 2025 at 12:08 | comment | added | Fourier_Asker | Sorry, still doesn't understand.... The reverse priority encoder will just output to me the highest index on opposite. In example of 10110100, the highest index is 7, the lowest is 2. If I do the opposite 00101101 We will receive the highest index at 5... The priority encoder itself is built on giving the maximum. I can build a PE that give the lowest, but I don't think that is the point (it will be tiring) | |
| Sep 25, 2025 at 11:54 | history | edited | TonyM | CC BY-SA 4.0 |
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| Sep 25, 2025 at 11:47 | comment | added | Fourier_Asker | Wait, so you say if I have 10110100, I will just connect it opposite 00101101 So in this case, I receive 101. I am trying to think and will update | |
| Sep 25, 2025 at 11:46 | comment | added | TonyM | @Fourier_Asker, A priority encoder will find the bits in the order you present them - just wire it up the right way around. | |
| Sep 25, 2025 at 11:42 | history | edited | TonyM | CC BY-SA 4.0 |
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| Sep 25, 2025 at 11:42 | comment | added | Fourier_Asker | Priority encoder will give me the last '1' if so (The MSB), not the LSB one. About VHDL or verilog, we didn't really use this, we need to design a circuit of it. But nonetheless, 3 priority encoder seems huge for this, I never thought it will take that many logic gates,. 10110100 - Priority encoder will give 111 | |
| Sep 25, 2025 at 11:40 | history | answered | TonyM | CC BY-SA 4.0 |