FPGA_UART_Module/isim.log at master · davidParraga/FPGA_UART_Module · GitHub

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ISim log file
Running: C:\Users\david\Desktop\88\UART\Prueba_transmisor_isim_beh.exe -intstyle ise -gui -tclbatch isim.cmd -wdb C:/Users/david/Desktop/88/UART/Prueba_transmisor_isim_beh.wdb
ISim P.20131013 (signature 0x7708f090)
This is a Full version of ISim.
Time resolution is 1 ps
# onerror resume
# wave add /
# run 1000 ns
Simulator is doing circuit initialization process.
Finished circuit initialization process.
ISim P.20131013 (signature 0x7708f090)
This is a Full version of ISim.
# run 1000 ns
Simulator is doing circuit initialization process.
Finished circuit initialization process.
# run 1000us
# run 1000us
ISim P.20131013 (signature 0x7708f090)
This is a Full version of ISim.
# run 1000 ns
Simulator is doing circuit initialization process.
Finished circuit initialization process.
# run 1000us
# run 1000us