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GoldenBugfacebook-github-bot
GoldenBug
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Refactor Shell Source Code Structure
Summary: This commit refactors the shell source code so that each sub command is contained within it's own source file and header. This makes the shell structure more expandable and limits the shell files from growing too large. New shell commands should be added in a similar way in the future. Reviewed By: garnermic Differential Revision: D38595995 fbshipit-source-id: ac9c2d14f534baa2f8d3915010bc4d0829392c51
1 parent 6276e68 commit 992ec94

17 files changed

Lines changed: 717 additions & 600 deletions

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‎common/service/sensor/sensor.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -274,6 +274,7 @@ uint8_t get_sensor_reading(uint8_t sensor_num, int *reading, uint8_t read_mode)
274274
case SENSOR_INIT_STATUS:
275275
case SENSOR_NOT_PRESENT:
276276
case SENSOR_NOT_ACCESSIBLE:
277+
case SENSOR_POLLING_DISABLE:
277278
cfg->cache = SENSOR_FAIL;
278279
return cfg->cache_status;
279280
default:

‎common/shell/commands/gpio_shell.c‎

Lines changed: 346 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,346 @@
1+
#include "gpio_shell.h"
2+
#include "hal_gpio.h"
3+
#include "plat_gpio.h"
4+
#include "shell_platform.h"
5+
#include <drivers/gpio.h>
6+
#include <stdio.h>
7+
8+
/*
9+
* Constants
10+
*
11+
* These constants are in the source file instead of the header file due to build problems
12+
* with using the SHELL_STATIC_SUBCMD_SET_CREATE macro.
13+
*/
14+
15+
#define GET_BIT_VAL(val, n) ((val & BIT(n)) >> (n))
16+
#define NUM_OF_GROUP 6
17+
#define REG_SCU 0x7E6E2000
18+
#define REG_GPIO_BASE 0x7e780000
19+
#define GPIO_DEVICE_PREFIX "GPIO0_"
20+
21+
int num_of_pin_in_one_group_lst[NUM_OF_GROUP] = { 32, 32, 32, 32, 32, 16 };
22+
char GPIO_GROUP_NAME_LST[NUM_OF_GROUP][10] = { "GPIO0_A_D", "GPIO0_E_H", "GPIO0_I_L",
23+
"GPIO0_M_P", "GPIO0_Q_T", "GPIO0_U_V" };
24+
enum GPIO_ACCESS { GPIO_READ, GPIO_WRITE };
25+
26+
gpio_flags_t int_type_table[] = { GPIO_INT_DISABLE, GPIO_INT_EDGE_RISING, GPIO_INT_EDGE_FALLING,
27+
GPIO_INT_EDGE_BOTH, GPIO_INT_LEVEL_LOW, GPIO_INT_LEVEL_HIGH };
28+
29+
#if PINMASK_RESERVE_CHECK
30+
enum CHECK_RESV { CHECK_BY_GROUP_IDX, CHECK_BY_GLOBAL_IDX };
31+
static int gpio_check_reserve(const struct device *dev, int gpio_idx, enum CHECK_RESV mode)
32+
{
33+
if (!dev) {
34+
return 1;
35+
}
36+
37+
const struct gpio_driver_config *const cfg = (const struct gpio_driver_config *)dev->config;
38+
39+
if (!cfg->port_pin_mask) {
40+
return 1;
41+
}
42+
43+
int gpio_idx_in_group;
44+
if (mode == CHECK_BY_GROUP_IDX) {
45+
gpio_idx_in_group = gpio_idx;
46+
} else if (mode == CHECK_BY_GLOBAL_IDX) {
47+
gpio_idx_in_group = gpio_idx % GPIO_GROUP_SIZE;
48+
} else {
49+
return 1;
50+
}
51+
52+
if ((cfg->port_pin_mask & (gpio_port_pins_t)BIT(gpio_idx_in_group)) == 0U) {
53+
return 1;
54+
}
55+
56+
return 0;
57+
}
58+
#endif
59+
60+
static int gpio_access_cfg(const struct shell *shell, int gpio_idx, enum GPIO_ACCESS mode,
61+
int *data)
62+
{
63+
if (!shell) {
64+
return 1;
65+
}
66+
67+
if (gpio_idx >= GPIO_CFG_SIZE || gpio_idx < 0) {
68+
shell_error(shell, "gpio_access_cfg - gpio index out of bound!");
69+
return 1;
70+
}
71+
72+
switch (mode) {
73+
case GPIO_READ:
74+
if (gpio_cfg[gpio_idx].is_init == DISABLE) {
75+
return 1;
76+
}
77+
78+
uint32_t g_val = sys_read32(GPIO_GROUP_REG_ACCESS[gpio_idx / 32]);
79+
uint32_t g_dir = sys_read32(GPIO_GROUP_REG_ACCESS[gpio_idx / 32] + 0x4);
80+
81+
char *pin_prop = (gpio_cfg[gpio_idx].property == OPEN_DRAIN) ? "OD" : "PP";
82+
char *pin_dir = (gpio_cfg[gpio_idx].direction == GPIO_INPUT) ? "input" : "output";
83+
84+
char *pin_dir_reg = "I";
85+
if (g_dir & BIT(gpio_idx % 32))
86+
pin_dir_reg = "O";
87+
88+
int val = gpio_get(gpio_idx);
89+
if (val == 0 || val == 1) {
90+
shell_print(shell, "[%-3d] %-35s: %-3s | %-6s(%s) | %d(%d)", gpio_idx,
91+
gpio_name[gpio_idx], pin_prop, pin_dir, pin_dir_reg, val,
92+
GET_BIT_VAL(g_val, gpio_idx % 32));
93+
} else {
94+
shell_print(shell, "[%-3d] %-35s: %-3s | %-6s(%s) | %s", gpio_idx,
95+
gpio_name[gpio_idx], pin_prop, pin_dir, pin_dir_reg, "resv");
96+
}
97+
98+
break;
99+
100+
case GPIO_WRITE:
101+
if (!data) {
102+
shell_error(shell, "gpio_access_cfg - GPIO_WRITE value empty!");
103+
return 1;
104+
}
105+
106+
if (*data != 0 && *data != 1) {
107+
shell_error(
108+
shell,
109+
"gpio_access_cfg - GPIO_WRITE value should only accept 0 or 1!");
110+
return 1;
111+
}
112+
113+
if (gpio_set(gpio_idx, *data)) {
114+
shell_error(shell, "gpio_access_cfg - GPIO_WRITE failed!");
115+
return 1;
116+
}
117+
118+
break;
119+
120+
default:
121+
shell_error(shell, "gpio_access_cfg - No such mode %d!", mode);
122+
break;
123+
}
124+
125+
return 0;
126+
}
127+
128+
static int gpio_get_group_idx_by_dev_name(const char *dev_name)
129+
{
130+
if (!dev_name) {
131+
return -1;
132+
}
133+
134+
int group_idx = -1;
135+
for (int i = 0; i < ARRAY_SIZE(GPIO_GROUP_NAME_LST); i++) {
136+
if (!strcmp(dev_name, GPIO_GROUP_NAME_LST[i]))
137+
group_idx = i;
138+
}
139+
140+
return group_idx;
141+
}
142+
143+
static const char *gpio_get_name(const char *dev_name, int pin_num)
144+
{
145+
if (!dev_name) {
146+
return NULL;
147+
}
148+
149+
int name_idx = -1;
150+
name_idx = pin_num + 32 * gpio_get_group_idx_by_dev_name(dev_name);
151+
152+
if (name_idx == -1) {
153+
return NULL;
154+
}
155+
156+
if (name_idx >= GPIO_CFG_SIZE) {
157+
return "Undefined";
158+
}
159+
160+
return gpio_name[name_idx];
161+
}
162+
163+
/*
164+
* Command GPIO
165+
*/
166+
void cmd_gpio_cfg_list_group(const struct shell *shell, size_t argc, char **argv)
167+
{
168+
if (argc != 2) {
169+
shell_warn(shell, "Help: platform gpio list_group <gpio_device>");
170+
return;
171+
}
172+
173+
const struct device *dev;
174+
dev = device_get_binding(argv[1]);
175+
176+
if (!dev) {
177+
shell_error(shell, "Device [%s] not found!", argv[1]);
178+
return;
179+
}
180+
181+
int g_idx = gpio_get_group_idx_by_dev_name(dev->name);
182+
int max_group_pin = num_of_pin_in_one_group_lst[g_idx];
183+
184+
uint32_t g_val = sys_read32(GPIO_GROUP_REG_ACCESS[g_idx]);
185+
uint32_t g_dir = sys_read32(GPIO_GROUP_REG_ACCESS[g_idx] + 0x4);
186+
187+
for (int index = 0; index < max_group_pin; index++) {
188+
if (gpio_cfg[g_idx * 32 + index].is_init == DISABLE) {
189+
shell_print(shell, "[%-3d][%s %-3d] %-35s: -- | %-9s | NA",
190+
g_idx * 32 + index, dev->name, index, "gpio_disable", "i/o");
191+
continue;
192+
}
193+
194+
#if PINMASK_RESERVE_CHECK
195+
/* avoid pin_mask from devicetree "gpio-reserved" */
196+
if (gpio_check_reserve(dev, index, CHECK_BY_GROUP_IDX)) {
197+
shell_print(shell, "[%-3d][%s %-3d] %-35s: -- | %-9s | NA",
198+
g_idx * 32 + index, dev->name, index, "gpio_reserve", "i/o");
199+
continue;
200+
}
201+
#endif
202+
char *pin_dir = "output";
203+
if (gpio_cfg[g_idx * 32 + index].direction == GPIO_INPUT) {
204+
pin_dir = "input";
205+
}
206+
207+
char *pin_dir_reg = "I";
208+
if (g_dir & BIT(index)) {
209+
pin_dir_reg = "O";
210+
}
211+
212+
char *pin_prop =
213+
(gpio_cfg[g_idx * 32 + index].property == OPEN_DRAIN) ? "OD" : "PP";
214+
215+
int rc;
216+
rc = gpio_pin_get(dev, index);
217+
if (rc >= 0) {
218+
shell_print(shell, "[%-3d][%s %-3d] %-35s: %2s | %-6s(%s) | %d(%d)",
219+
g_idx * 32 + index, dev->name, index,
220+
gpio_get_name(dev->name, index), pin_prop, pin_dir, pin_dir_reg,
221+
rc, GET_BIT_VAL(g_val, index));
222+
} else {
223+
shell_error(shell, "[%-3d][%s %-3d] %-35s: %2s | %-6s | err[%d]",
224+
g_idx * 32 + index, dev->name, index,
225+
gpio_get_name(dev->name, index), pin_prop, pin_dir, rc);
226+
}
227+
}
228+
229+
return;
230+
}
231+
232+
void cmd_gpio_cfg_list_all(const struct shell *shell, size_t argc, char **argv)
233+
{
234+
if (argc != 1) {
235+
shell_warn(shell, "Help: platform gpio list_all");
236+
return;
237+
}
238+
239+
for (int gpio_idx = 0; gpio_idx < GPIO_CFG_SIZE; gpio_idx++)
240+
gpio_access_cfg(shell, gpio_idx, GPIO_READ, NULL);
241+
242+
return;
243+
}
244+
245+
void cmd_gpio_cfg_get(const struct shell *shell, size_t argc, char **argv)
246+
{
247+
if (argc != 2) {
248+
shell_warn(shell, "Help: platform gpio get <gpio_idx>");
249+
return;
250+
}
251+
252+
int gpio_index = strtol(argv[1], NULL, 10);
253+
if (gpio_access_cfg(shell, gpio_index, GPIO_READ, NULL))
254+
shell_error(shell, "gpio[%d] get failed!", gpio_index);
255+
256+
return;
257+
}
258+
259+
void cmd_gpio_cfg_set_val(const struct shell *shell, size_t argc, char **argv)
260+
{
261+
if (argc != 3) {
262+
shell_warn(shell, "Help: platform gpio set val <gpio_idx> <data>");
263+
return;
264+
}
265+
266+
int gpio_index = strtol(argv[1], NULL, 10);
267+
int data = strtol(argv[2], NULL, 10);
268+
269+
if (gpio_access_cfg(shell, gpio_index, GPIO_WRITE, &data))
270+
shell_error(shell, "gpio[%d] --> %d ,failed!", gpio_index, data);
271+
else
272+
shell_print(shell, "gpio[%d] --> %d ,success!", gpio_index, data);
273+
274+
return;
275+
}
276+
277+
void cmd_gpio_cfg_set_int_type(const struct shell *shell, size_t argc, char **argv)
278+
{
279+
if (argc != 3) {
280+
shell_warn(shell, "Help: platform gpio set int_type <gpio_idx> <type>");
281+
shell_warn(
282+
shell,
283+
" type: [0]disable [1]edge-rise [2]edge-fall [3]edge-both [4]low [5]high");
284+
return;
285+
}
286+
287+
int gpio_index = strtol(argv[1], NULL, 10);
288+
int type_idx = strtol(argv[2], NULL, 10);
289+
290+
if (type_idx >= ARRAY_SIZE(int_type_table) || type_idx < 0) {
291+
shell_error(shell, "Wrong index of type!");
292+
shell_warn(
293+
shell,
294+
"type: [0]disable [1]edge-rise [2]edge-fall [3]edge-both [4]low [5]high");
295+
return;
296+
}
297+
298+
if (gpio_interrupt_conf(gpio_index, int_type_table[type_idx]))
299+
shell_error(shell, "gpio[%d] --> type[%d] failed!", gpio_index, type_idx);
300+
else
301+
shell_print(shell, "gpio[%d] --> type[%d] success!", gpio_index, type_idx);
302+
303+
return;
304+
}
305+
306+
void cmd_gpio_muti_fn_ctl_list(const struct shell *shell, size_t argc, char **argv)
307+
{
308+
if (argc != 1) {
309+
shell_warn(shell, "Help: platform gpio multifnctl");
310+
return;
311+
}
312+
313+
printf("[ REG ] hi lo\n");
314+
for (int lst_idx = 0; lst_idx < GPIO_MULTI_FUNC_CFG_SIZE; lst_idx++) {
315+
uint32_t cur_status = sys_read32(GPIO_MULTI_FUNC_PIN_CTL_REG_ACCESS[lst_idx]);
316+
printf("[0x%x]", GPIO_MULTI_FUNC_PIN_CTL_REG_ACCESS[lst_idx]);
317+
for (int i = 32; i > 0; i--) {
318+
if (!(i % 4)) {
319+
printf(" ");
320+
}
321+
if (!(i % 8)) {
322+
printf(" ");
323+
}
324+
printf("%d", (int)GET_BIT_VAL(cur_status, i - 1));
325+
}
326+
printf("\n");
327+
}
328+
329+
shell_print(shell, "\n");
330+
}
331+
332+
/* GPIO sub command */
333+
void device_gpio_name_get(size_t idx, struct shell_static_entry *entry)
334+
{
335+
const struct device *dev = shell_device_lookup(idx, GPIO_DEVICE_PREFIX);
336+
337+
if (entry == NULL) {
338+
printf("device_gpio_name_get passed null entry\n");
339+
return;
340+
}
341+
342+
entry->syntax = (dev != NULL) ? dev->name : NULL;
343+
entry->handler = NULL;
344+
entry->help = NULL;
345+
entry->subcmd = NULL;
346+
}

‎common/shell/commands/gpio_shell.h‎

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,36 @@
1+
#ifndef GPIO_SHELL_H
2+
#define GPIO_SHELL_H
3+
4+
#include <stdlib.h>
5+
#include <shell/shell.h>
6+
#include <drivers/gpio.h>
7+
8+
void cmd_gpio_cfg_list_group(const struct shell *shell, size_t argc, char **argv);
9+
void cmd_gpio_cfg_list_all(const struct shell *shell, size_t argc, char **argv);
10+
void cmd_gpio_cfg_get(const struct shell *shell, size_t argc, char **argv);
11+
void cmd_gpio_cfg_set_val(const struct shell *shell, size_t argc, char **argv);
12+
void cmd_gpio_cfg_set_int_type(const struct shell *shell, size_t argc, char **argv);
13+
void cmd_gpio_muti_fn_ctl_list(const struct shell *shell, size_t argc, char **argv);
14+
void device_gpio_name_get(size_t idx, struct shell_static_entry *entry);
15+
16+
SHELL_DYNAMIC_CMD_CREATE(gpio_device_name, device_gpio_name_get);
17+
18+
SHELL_STATIC_SUBCMD_SET_CREATE(sub_gpio_set_cmds,
19+
SHELL_CMD(val, NULL, "Set pin value.", cmd_gpio_cfg_set_val),
20+
SHELL_CMD(int_type, NULL, "Set interrupt pin type.",
21+
cmd_gpio_cfg_set_int_type),
22+
SHELL_SUBCMD_SET_END);
23+
24+
/* GPIO sub commands */
25+
SHELL_STATIC_SUBCMD_SET_CREATE(
26+
sub_gpio_cmds,
27+
SHELL_CMD(list_group, &gpio_device_name, "List all GPIO config from certain group.",
28+
cmd_gpio_cfg_list_group),
29+
SHELL_CMD(list_all, NULL, "List all GPIO config.", cmd_gpio_cfg_list_all),
30+
SHELL_CMD(get, NULL, "Get GPIO config", cmd_gpio_cfg_get),
31+
SHELL_CMD(set, &sub_gpio_set_cmds, "Set GPIO config", NULL),
32+
SHELL_CMD(multifnctl, NULL, "List all GPIO multi-function control regs.",
33+
cmd_gpio_muti_fn_ctl_list),
34+
SHELL_SUBCMD_SET_END);
35+
36+
#endif

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