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A history of chipmaking at IBM

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Power Architecture editors, developerWorks, IBM

30 Mar 2004
Updated 15 Dec 2005

In the last decade alone, IBM scientists have announced one semiconductor breakthrough after another: copper technology, silicon-on-insulator, silicon germanium, strained silicon, and low-k dielectrics. All of these technologies came out of IBM's fertile in-house research community. This prowess in modern chipmaking know-how didn't come out of a vacuum -- rather, it came out of the hermetically-sealed clean rooms of the most advanced R & D department in the semiconductor industry.

In the beginning, each computer's central processing unit, or CPU, was unique. Each had its own instruction set, which was incompatible with any other. All of that changed back in the thermionic valve (or "vacuum tube") days with the introduction of the IBM S/360™ line of computers, in 1964. Suddenly, code didn't have to be thrown away and reimplemented every time you bought a new computer. Today's IBM mainframes still maintain backwards-compatibility with that revolutionary 1962 instruction set. And the same spirit of compatibility infuses IBM's other CPU lines.

At the user-mode level, the instruction set of the PowerPC® family of processors provides full application compatibility, from the lowliest automated traffic light to the powerful BladeCenter JS20 or the Apple Xserve G5. In addition, PowerPC microprocessors share a large common instruction set with IBM's other RISC processor lines, POWER™ and Star, which leads to "near" compatibility across all three families. In many cases, this equals binary compatibility; in some cases, it means that a simple recompilation is needed; in all cases, it means that porting is a breeze.

IBM's four families of processors -- the Power Architecture™, the PowerPC family of processors, the Star chips, and even the line of chips that power IBM mainframes -- all have a common ancestor: the IBM 801.

The fifth and newest processor family to join this illustrious group is the Cell Broadband Engine Architecture family. While its central processor, or PPU, is Power-like -- for instance, compatible enough to run PowerPC Linux -- it is surrounded by a number of SPUs (in the first iteration, eight) which use a completely different ISA. For this reason and because it is jointly designed and owned by IBM, Sony, and Toshiba rather than IBM alone, it is really a separate product line, rather than another PowerPC.

Family inheritance

The IBM 801 started out attempting to solve the same problem as a lot of the computers in the 1970s: switching telephone calls. The design team's goal was to complete one instruction per clock cycle, and to accommodate 300 calls per minute.

Most of the computers of the day, such as the IBM S/360 mainframe, had complex and redundant instruction sets known today as CISC (complex instruction set computer). The trend towards miniaturization in computing, which began with the 1947 invention of the transfer resistor (or "transistor") only exacerbated this. As integrated circuits grew smaller, designers took advantage of the extra space to cram even more instructions into the chip. All of this complexity meant that by the 1970s, computer chips could do really amazing things (like power increasingly complex digital watches). But it also meant that the chips needed more machine time to execute, making it impossible for the 801 team to achieve their performance goals.

IBM's John Cocke was no stranger to the battle against complexity. He had already worked on the IBM Stretch computer, a rival to the IBM 704 mainframe, and on Stretch successor ACS (Advanced Computing Systems), rival to the 704's successor, the S/360.

Compatible by design

The PowerPC architecture is organized into three instruction-set levels called "books." Book I is the base set of user instructions and registers that should be common to all PowerPC implementations. Book II defines additional user-level functionality that is outside the normal requirements for application software. Book III defines privileged operations typically required b