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Why does my CPU's efficiency core have a lower core-to-core latency?

I used https://github.com/nviennot/core-to-core-latency to measure my CPU's (Intel(R) Core(TM) Ultra 7 268V) core-to-core latency and these are my results: ~/Developer/core-to-core-latency main ❯ ...
weineng's user avatar
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What is the cause of x86_64 CPU do not receive the interrupt after switching into user mode?

I want to switch into user mode from kernel mode by switch_to_user_mode: cli mov ax, 0x23 mov ds, ax mov es, ax mov fs, ax mov gs, ax push 0x23 push rdi pushfq ...
baponkar's user avatar
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intel compiler and <mkl.h>

In the framework of a course about high performance computation, i have to use the intel's compiler for c++ (icx now and icpc before i guess) and the library <mkl.h> from C. My compiler does ...
LGW 93's user avatar
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Meaning of Q in SSE instruction mnemonics

I'm learning SSE programming and I come across this instruction: (V)CVTDQ2PS—Convert Packed Doubleword Integers to Packed Single-Precision Floating Point I thought CVT means convert, D means Dword, ...
user239216's user avatar
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Microphone and Camera Issues After Installing FFmpeg [migrated]

After installing FFmpeg using Winget on my Windows laptop, my microphone started capturing a lot of noise it doesnt work and my camera began flickering. The only fix that worked was performing a full ...
Fang's user avatar
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P and E cores when doing multithreaded programming

When you split an algorithm/function/whatever to run as separate threads, let's say I launch 8 threads, you don't know that each thread is going to run on a separate one of my 8 cores, as it's the job ...
Zebrafish's user avatar
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Which type of Intel 3rd generation processors(Icelake) has xcc micro-architecture

The picture or the website of Intel don't tell the differences between these types of Icelake processors in micro-architecture(XCC or HCC). I hope somebody can tell me whether the 4314 processor ...
bihu37's user avatar
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Docker Desktop Not Responding on macOS (Intel) After Multiple Reinstalls

Body: I am facing an issue with Docker Desktop on my MacBook (Intel) running macOS [mention your macOS version]. Despite multiple attempts to install, uninstall, and reinstall Docker, the app fails to ...
Oselade George's user avatar
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How to waste a few CPU cycles without causing any memory accesses

I'm looking for a low-overhead method for my program to stall a few cycles on an Intel CPU, without causing memory accesses or side effects that could alter the CPU components' data (e.g. no usleep())....
Mani's user avatar
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Recompiling the Basic Extension (e.g., instrumentation-tracer-tool) from Source Code in Intel Simics

I want to re-compile the basic extension (e.g., instrumentation-tracer-tool) from its source code in Simics 6.0.185. After installing with ispm packages, I can see a Makefile in the instrumentation-...
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How many independent threads can be run on a single XVE of Intel Xe2 core?

I have a kernel with a highly divergent control flow, which is not suitable for parallelizing by mapping into individual SIMD lanes. I would like to know how many independent threads, each with its ...
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Sriov VF using IAVF PMD stops receiving traffic after restarting RX/TX queue in a DPDK application

I have a problem with stopping/starting VF RX/TX queues from our DPDK application. I am using a patched DPDK 22.11.1 and RedHat 4.14 kernel. Traffic flows correctly until the first time we stop/start ...
Sriram Yagnaraman's user avatar
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1 answer
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What do the letters in port usage on uops.info mean?

What do the letters in the ports of the uops.info table mean? For example ADD (R64, R64) lists 1*p0156B at ports. The documentation says 1*p0156 means one microinstruction can be executed at ports 0, ...
asdfldsfdfjjfddjf's user avatar
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1 answer
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CMake with vcpkg - Including libbid.lib (intel math lib) as dependency for external source code (TWS API)

I'm working on a CMake C++ project using vcpkg to manage graphic package imports. The goal is to automate stock trading using the TWS API from Interactive Brokers (IBKR). Below is the current project ...
EducatedGoat's user avatar
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Issue with Conda Package Installation - Intel Channel Persistence

Environment Using Miniconda for Python package management Current Situation All configured channels are visible in conda info output and Intel is removed: During package installation, Conda ...
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