Timeline for How to design a circuit that outputs the binary position of the 3rd set bit from the right in an 8-bit input?
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| when toggle format | what | by | license | comment | |
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| Sep 30, 2025 at 6:18 | answer | added | greybeard | timeline score: 0 | |
| Sep 28, 2025 at 12:10 | comment | added | Russell McMahon♦ | Aare you allowed to use existing counters rather than gates? |2 x CD4017 + some diode resistor logic would do this easily. 1st 4017 steps outputs and has diode clamp from inputs at each 4017 output. These only go high when selected by 4017 when input is high. Second 4017 counts pulses and stops at 3rd pulse. || Ask if interested and unclear. Same could be done by you implementing equivalent to 4017 or similar. | |
| Sep 26, 2025 at 2:41 | answer | added | Jasen Слава Україні | timeline score: 2 | |
| Sep 25, 2025 at 21:04 | comment | added | Troutdog | HDL makes short work of problems like this, and it could be done sequentially or combinatorially. For a hand-drawn sequential schematic, I will offer a hint: make your bit position counter 4 bits, and use that 4th bit to stop everything. | |
| Sep 25, 2025 at 20:49 | vote | accept | Fourier_Asker | ||
| Sep 25, 2025 at 19:43 | answer | added | beeflobill | timeline score: 2 | |
| Sep 25, 2025 at 18:56 | answer | added | periblepsis | timeline score: 5 | |
| Sep 25, 2025 at 17:18 | comment | added | Spehro 'speff' Pefhany | Rather than two counters and a multiplexer, consider a counter and a shift register. | |
| Sep 25, 2025 at 16:58 | answer | added | user4574 | timeline score: 18 | |
| Sep 25, 2025 at 16:11 | history | became hot network question | |||
| Sep 25, 2025 at 14:38 | answer | added | Dave Tweed | timeline score: 2 | |
| Sep 25, 2025 at 13:37 | comment | added | TonyM | @Mattman944, that would produce just a circuit (and it could be done with a ROM). But it wouldn't produce any of the logic design skills that the question's educating author intends to bring out. | |
| Sep 25, 2025 at 12:24 | comment | added | Fourier_Asker | @Mattman944 Nothing actually, I need to just draw the circuit at requested. If its impossible without computer, I guess I will just skip this question (its not a mandatory, just wanted for me) | |
| Sep 25, 2025 at 12:14 | comment | added | Mattman944 | What computer tools do you have available to you and/or allowed to use? There are only 256 possible inputs, you could brute force it with a truth table. Then synthesis tools will optimize it. | |
| Sep 25, 2025 at 11:58 | comment | added | Fourier_Asker | @periblepsis ohhh ,I understand what you mean that we cannot receive 000 001 010, since there isn't such index. Yea, we can receive only 011+ Sorry!! | |
| Sep 25, 2025 at 11:57 | comment | added | TonyM | @Fourier_Asker, relax - everything you written is fine and friendly. 'lenience' in this case means someone's trying to change the question instead of just getting on and answering what's been asked. | |
| Sep 25, 2025 at 11:56 | comment | added | periblepsis | @Fourier_Asker I just mean that if the output is 000 or 001 then you know, in advance, that this cannot be right. You already accept 000. I'm just asking if the occasional 001 being output would be a problem to you. (001 is also impossible.) | |
| Sep 25, 2025 at 11:49 | comment | added | Fourier_Asker | @periblepsis what does it mean lenience? I wrote something bad before? if so, sorry, didn't mean it. I just tried to ask the question. What do you mean strict or an allowable 000 or 001? I really don't understand........ I trust you in this case | |
| Sep 25, 2025 at 11:48 | answer | added | H Price | timeline score: 2 | |
| Sep 25, 2025 at 11:47 | comment | added | periblepsis | @Fourier_Asker Yes, you were clear about 000. I was asking for lenience. Wondering if it would be okay to relax things from a strict 000 to an allowable 000 or 001. It can make some difference. But if you want an exact 000 in that case, that's fine. I'm not arguing. I am just asking. That's all. | |
| Sep 25, 2025 at 11:40 | answer | added | TonyM | timeline score: 10 | |
| Sep 25, 2025 at 11:36 | comment | added | Fourier_Asker | @periblepsis What do you mean binary 0 or 1 for a valid case? If we don't have 3 of '1' so we output zero, else we output the highest index as 3 bit. Hope I explained good. | |
| Sep 25, 2025 at 11:20 | comment | added | periblepsis | @Fourier_Asker You say that 000 is okay if there aren't 3 bits set to 1. Since you cannot ever output a binary 0 or 1 for a valid case, would either 000 or 001 be okay? The reason I ask is that both a 000 and a 001 output would be obviously describing the case where there's no answer. That allowance may help with the combinational parts of things. Just asking. | |
| Sep 25, 2025 at 10:55 | review | Close votes | |||
| Sep 30, 2025 at 3:03 | |||||
| Sep 25, 2025 at 10:15 | comment | added | Andy aka | There are simulators that you can use that will eat this up. | |
| Sep 25, 2025 at 10:00 | history | edited | toolic | CC BY-SA 4.0 |
deleted 16 characters in body
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| Sep 25, 2025 at 9:43 | comment | added | Fourier_Asker | @greybeard A priority encoder won’t help in this case. I considered it initially, but it only returns the highest index of the set bits. For example, both 11001010 and 10000000 would result in the output 111. That’s not what we need here. | |
| Sep 25, 2025 at 9:07 | comment | added | greybeard | When you have put down (!) an idea for 1st bit set, read up on priority encoders. | |
| Sep 25, 2025 at 8:27 | comment | added | Fourier_Asker | Now that I think about it both counters must be sequential. one counter counts the number of ones and stops at three. the other counter tracks the current bit index from LSB to MSB when the first counter reaches three, the second counter outputs the index if there are fewer than three ones, output is zero. my first 8bit counter is bad then. | |
| Sep 25, 2025 at 8:22 | comment | added | Fourier_Asker | @greybeard Didn't think of it yet, but you say without sequential logic here? Not easy, will take a while to think of it. | |
| Sep 25, 2025 at 8:22 | comment | added | Fourier_Asker | @Justme Uploaded my 8bit counter. | |
| Sep 25, 2025 at 8:20 | history | edited | Fourier_Asker | CC BY-SA 4.0 |
Added 8bit counter
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| Sep 25, 2025 at 8:11 | comment | added | Justme | You are not showing how the counter looks like so there can be dozens of ways to stop it from counting or ignoring further matches to latch the output. | |
| Sep 25, 2025 at 8:10 | comment | added | greybeard | Nice task. How would you establish the binary encoding of the first set bit from the right? The 2nd? (I'd avoid sequential logic here.) | |
| Sep 25, 2025 at 8:06 | history | asked | Fourier_Asker | CC BY-SA 4.0 |