0
\$\begingroup\$

I'm working a network security project where I need full control over a custom router setup. It's basically something to build onto the OSI model to allow for routing packets securely and directly, with built in router authorization. Because of this I'm not using traditional ethernet interfaces to SPI on my multicore microcontroller running at 350mhz

To my understanding I can use the Analog 8138 Low Distortion Differential ADC driver to drive the Transmit+ and Transmit- pairs of ethernet. Likewise, I can use the ADN4662 Single, 3 V, CMOS, LVDS Differential Line Receiver to get binary data shifted into my microcontroller from Receive+ and Receive-.

My confusion is how to do this same principle with the remaining 2 pairs of bidirectional transmit +/- of ethernet. Is it possible to use a differential coupler and these same IC's to parse this binary data? If so, what requirements would I need for a differential decoupler (I'm assuming clock speed). Or is there another IC that would be better meant for this that I can't seem to find?

\$\endgroup\$
11
  • \$\begingroup\$ First things first. Are you aiming for 1 Gbps, 100 Mbps or 10 Mbps Ethernet? Second, of those, only 10 Mbps Ethernet is digital with one bit values, the other two have 3 or 5 different voltages so they are not binary data on wire. Also only 1 Gbps has 4 bidir pairs. And traditionally Ethernet interfaces don't use SPI so it is really unclear how much you even understand about Ethernet and how to interface it, it seems very odd what you want to do and why. Normally you will use an MCU with Ethernet MAC and put a suitable PHY chip of your liking, and it requires none of what you want to do. \$\endgroup\$ Commented Apr 12 at 21:45
  • \$\begingroup\$ As you're considering raw pairs, it sounds a lot like this question: electronics.stackexchange.com/questions/767029/… which has the same considerations (and then some) for Ethernet. || A "traditional Ethernet interface" to construct a "custom router setup" would use a MCU with integrated Ethernet switch; the ICs they use in switches and routers normally. SPI sounds like a roundabout or limited solution (e.g. Wiznet TCP/IP chipset), not "traditional". What is your actual underlying application and requirement? (Avoid X-Y questions.) \$\endgroup\$ Commented Apr 12 at 22:26
  • \$\begingroup\$ 1 Gbps. Yeah I'm still researching the requirements for this project, so not claiming full understanding of ethernet. I do know of ethernet to spi interfaces to use with an MCU. I'll look into the phy chip. Without revealing too much, the transport layer turns into a binary stream of a different clock speed, not application data. Where I'm assuming a phy has a set clock speed. \$\endgroup\$ Commented Apr 12 at 22:30
  • \$\begingroup\$ So I really need to read the frame byte by byte and not just pass it over from an ethernet interface. \$\endgroup\$ Commented Apr 12 at 22:36
  • 2
    \$\begingroup\$ @RyanFitzgerald If you want to have Gigabit Ethernet and modify contents of packets, please forget your approach right away. Any computing device with two Ethernet ports can act as a router and you can make a router that receives packets, alters content, and sends packets, but gigabit interfaces and in dual are only on higher end devices that run Linux so any small PC or Raspberry Pi type device will work for Linux. If you want to modify the packet content on-the-fly, what you really want is an FPGA with two PHYs. Good luck with whatever you are trying to achieve. \$\endgroup\$ Commented Apr 13 at 6:04

0

Reset to default

Start asking to get answers

Find the answer to your question by asking.

Ask question

Explore related questions

See similar questions with these tags.