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1. fix-tcpip-project fix-tcpip-project Public

   Hardware design project of the FIX and TCP/IP offload engines on FPGA, containing HDL codes and Python codes for testing.

   VHDL 22 4

2. design-gateway/packet-sniffing design-gateway/packet-sniffing Public

   An open-source FPGA framework for network packet forwarding and capturing on Alveo U55C.

   C++ 1

3. silagokth/SiLagoDoc silagokth/SiLagoDoc Public

   Documentation of SiLago platform

   6 1

4. silagokth/sylva-suite silagokth/sylva-suite Public

   ALS for Silago

   Rust

5. silagokth/sylva-components silagokth/sylva-components Public

   Sylva RTL components to compose the full system at RTL level

   SystemVerilog