Pinned Loading

1. fpga-trading-systems fpga-trading-systems Public

   Production-grade low-latency FPGA trading system. Features custom VHDL 10GBASE-R PHY, hardware NASDAQ ITCH 5.0 order book, C++ DPDK/XDP kernel bypass, and PCIe DMA acceleration. LLM-Inference

   VHDL 79 12

2. 33-fpga-10gbe-phy-custom 33-fpga-10gbe-phy-custom Public

   A complete custom implementation of the 10GBASE-R Physical Layer (PHY) in VHDL. This implementation provides full control over the 10 Gigabit Ethernet physical layer without relying on encrypted ve…

   VHDL 2

3. 34-fpga-tcp-itch-parser 34-fpga-tcp-itch-parser Public

   Implements multi-protocol market data parsing supporting NASDAQ (UDP/MoldUDP64), ASX (TCP/SoupBinTCP), and B3 Brazilian Exchange (UDP/SBE) market data feeds. Integrates with Project 33's 10GBASE-R …

   VHDL 1

4. versal-ai-edge-vd100-linux versal-ai-edge-vd100-linux Public

   Custom Yocto Linux bring-up on Alinx VD100 (XCVE2302). v1: SD/Ethernet/USB. v2: I2C/GPIO/PL LED/kernel driver. v3: XRT + AIE-ML pipeline + Ethereum. No VCK190. No MATLAB. AMD EDF 25.11 / Scarthgap.

5. 38-fpga-order-book-10gbe 38-fpga-order-book-10gbe Public

   Order Book 10GbE - FPGA Order Book with UDP TX and Latency Measurement

   VHDL

6. vd100-aie-pipeline vd100-aie-pipeline Public

   First documented end-to-end PL + AIE-ML + PS pipeline on Versal AI Edge XCVE2302 (VD100). MA crossover trading signal via HLS DMA + AIE graph + XRT host app. No VCK190. No MATLAB. Ethereum audit lo…

   C++