fby3.5: cl:Add read and write BIC register command#236
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Dependency: #235 |
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| for (uint8_t i = 0; i < read_len; i++) { | ||
| msg->data[i] = *(uint8_t *)(addr + i); | ||
| } |
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Any reason not to use memcpy?
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Modify with your suggestions.
We have fixed this and do the forced update.
Please review it. Thanks.
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Summary: - Add OEM command to read and write BIC register Test Plan: - Build Code: Pass - Command Test: Pass Log: read register 0x7e7b0300 [BIC console] uart:~$ md 0x7e7b0300 [7e7b0300] 00000001 [BMC console] root@bmc-oob:~# bic-util slot1 0xe0 0x68 0x9c 0x9c 0x00 0x00 0x03 0x7b 0x7e 0x4 9C 9C 00 01 00 00 00 write 2 bytes 0x2211 to register 0x7e7b0300 [BMC console] root@bmc-oob:~# bic-util slot1 0xe0 0x69 0x9c 0x9c 0x00 0x00 0x03 0x7b 0x7e 0x2 0x11 0x22 9C 9C 00 read register 0x7e7b0300 [BIC console] uart:~$ md 0x7e7b0300 [7e7b0300] 00002211 [BMC console] root@bmc-oob:~# bic-util slot1 0xe0 0x68 0x9c 0x9c 0x00 0x00 0x03 0x7b 0x7e 0x4 9C 9C 00 11 22 00 00
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Summary: fby3.5: cl:Add read and write BIC register command - Add OEM command to read and write BIC register Dependency: #235 Pull Request resolved: #236 Test Plan: - Build Code: Pass - Command Test: Pass Log: read register 0x7e7b0300 [BIC console] uart:~$ md 0x7e7b0300 [7e7b0300] 00000001 [BMC console] root@bmc-oob:~# bic-util slot1 0xe0 0x68 0x9c 0x9c 0x00 0x00 0x03 0x7b 0x7e 0x4 9C 9C 00 01 00 00 00 write 2 bytes 0x2211 to register 0x7e7b0300 [BMC console] root@bmc-oob:~# bic-util slot1 0xe0 0x69 0x9c 0x9c 0x00 0x00 0x03 0x7b 0x7e 0x2 0x11 0x22 9C 9C 00 read register 0x7e7b0300 [BIC console] uart:~$ md 0x7e7b0300 [7e7b0300] 00002211 [BMC console] root@bmc-oob:~# bic-util slot1 0xe0 0x68 0x9c 0x9c 0x00 0x00 0x03 0x7b 0x7e 0x4 9C 9C 00 11 22 00 00 Reviewed By: garnermic Differential Revision: D35731221 Pulled By: GoldenBug fbshipit-source-id: e2042e36cb48736aa7fcea8833ab49987c97bce9
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Summary: fby3.5: bb: Fix IPMB TX/RX - Fix BB IPMB TX/RX threads can't malloc successfully problem. - Move MAX_IPMB_IDX to avoid forgetting chagne its value when adding a new IPMB task. Dependency: #236 Pull Request resolved: #238 Test Plan: 1. Check BB IPMB is normal. - Get BB fw version root@bmc-oob:~# fw-util slot1 --version bb_bic BB Bridge-IC Version: oby35-bb-v2022.01.01 - Get BB device ID root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0x18 0x01 9C 9C 00 10 07 01 00 00 80 01 01 02 BF 9C 9C 00 00 00 00 00 00 00 2. Check CL IPMB is normal. - Get CL fw version root@bmc-oob:~# fw-util slot1 --version bic SB Bridge-IC Version: oby35-cl-v2022.06.51 - Get CL device ID root@bmc-oob:~# bic-util slot1 0x18 0x01 00 80 11 06 02 BF 9C 9C 00 00 00 00 00 00 00 Reviewed By: garnermic Differential Revision: D35731222 Pulled By: GoldenBug fbshipit-source-id: 72001a49119916e50698dc550c33b7283fe44e6c
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Summary: fby3.5: cl:Add read and write BIC register command - Add OEM command to read and write BIC register Dependency: #235 Pull Request resolved: #236 Test Plan: - Build Code: Pass - Command Test: Pass Log: read register 0x7e7b0300 [BIC console] uart:~$ md 0x7e7b0300 [7e7b0300] 00000001 [BMC console] root@bmc-oob:~# bic-util slot1 0xe0 0x68 0x9c 0x9c 0x00 0x00 0x03 0x7b 0x7e 0x4 9C 9C 00 01 00 00 00 write 2 bytes 0x2211 to register 0x7e7b0300 [BMC console] root@bmc-oob:~# bic-util slot1 0xe0 0x69 0x9c 0x9c 0x00 0x00 0x03 0x7b 0x7e 0x2 0x11 0x22 9C 9C 00 read register 0x7e7b0300 [BIC console] uart:~$ md 0x7e7b0300 [7e7b0300] 00002211 [BMC console] root@bmc-oob:~# bic-util slot1 0xe0 0x68 0x9c 0x9c 0x00 0x00 0x03 0x7b 0x7e 0x4 9C 9C 00 11 22 00 00 Reviewed By: garnermic Differential Revision: D35941583 Pulled By: GoldenBug fbshipit-source-id: 477405a14f8ced5e79a56300342583f9a6479a3f
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Summary: fby3.5: bb: Fix IPMB TX/RX - Fix BB IPMB TX/RX threads can't malloc successfully problem. - Move MAX_IPMB_IDX to avoid forgetting chagne its value when adding a new IPMB task. Dependency: #236 Pull Request resolved: #238 Test Plan: 1. Check BB IPMB is normal. - Get BB fw version root@bmc-oob:~# fw-util slot1 --version bb_bic BB Bridge-IC Version: oby35-bb-v2022.01.01 - Get BB device ID root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0x18 0x01 9C 9C 00 10 07 01 00 00 80 01 01 02 BF 9C 9C 00 00 00 00 00 00 00 2. Check CL IPMB is normal. - Get CL fw version root@bmc-oob:~# fw-util slot1 --version bic SB Bridge-IC Version: oby35-cl-v2022.06.51 - Get CL device ID root@bmc-oob:~# bic-util slot1 0x18 0x01 00 80 11 06 02 BF 9C 9C 00 00 00 00 00 00 00 Reviewed By: garnermic Differential Revision: D35941600 Pulled By: GoldenBug fbshipit-source-id: 6f8c437b896729d6197c6c0ee218401597285905
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fby3.5: cl:Add read and write BIC register command
Summary:
Dependency: #235
Test Plan:
Log:
read register 0x7e7b0300
[BIC console]
uart:~$ md 0x7e7b0300
[7e7b0300] 00000001
[BMC console]
root@bmc-oob:~# bic-util slot1 0xe0 0x68 0x9c 0x9c 0x00 0x00 0x03 0x7b 0x7e 0x4
9C 9C 00 01 00 00 00
write 2 bytes 0x2211 to register 0x7e7b0300
[BMC console]
root@bmc-oob:~# bic-util slot1 0xe0 0x69 0x9c 0x9c 0x00 0x00 0x03 0x7b 0x7e 0x2 0x11 0x22
9C 9C 00
read register 0x7e7b0300
[BIC console]
uart:~$ md 0x7e7b0300
[7e7b0300] 00002211
[BMC console]
root@bmc-oob:~# bic-util slot1 0xe0 0x68 0x9c 0x9c 0x00 0x00 0x03 0x7b 0x7e 0x4
9C 9C 00 11 22 00 00