fby3.5: common: Change I2C master w/r to 0-base#256
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Summary: - Fix IPMI command I2C scan return incorrect address. The root cause is that we don't check the I2C bus device and still return with the buffered data. Solution is to check I2C bus device existence before i2c scan. - Change bus base of I2C scan IPMI command from 1-base to 0-bsae. Test plan: - Budil code: Pass - I2C scan command: Pass Log: 1. Check BB BIC I2C scan command. - Before fix root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0xe0 0x60 0x9c 0x9c 0x0 0 9C 9C 00 10 39 60 00 9C 9C 00 1E 80 9C 9E root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0xe0 0x60 0x9c 0x9c 0x0 1 9C 9C 00 10 39 60 00 9C 9C 00 1E 80 9C 9E root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0xe0 0x60 0x9c 0x9c 0x0 2 9C 9C 00 10 39 60 00 9C 9C 00 80 88 A2 B2 BE root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0xe0 0x60 0x9c 0x9c 0x0 3 9C 9C 00 10 39 60 00 9C 9C 00 4E 50 60 root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0xe0 0x60 0x9c 0x9c 0x0 4 9C 9C 00 10 39 60 00 9C 9C 00 1E 80 9C 9E root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0xe0 0x60 0x9c 0x9c 0x0 5 9C 9C 00 10 39 60 00 9C 9C 00 1E 80 9C 9E root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0xe0 0x60 0x9c 0x9c 0x0 6 9C 9C 00 10 39 60 00 9C 9C 00 1E 80 9C 9E root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0xe0 0x60 0x9c 0x9c 0x0 7 9C 9C 00 10 39 60 00 9C 9C 00 1E 80 9C 9E - After fix root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0xe0 0x60 0x9c 0x9c 0x0 0 9C 9C 00 10 39 60 00 9C 9C 00 1E 80 9C 9E root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0xe0 0x60 0x9c 0x9c 0x0 1 9C 9C 00 10 39 60 00 9C 9C 00 80 88 A2 B2 BE root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0xe0 0x60 0x9c 0x9c 0x0 2 9C 9C 00 10 39 60 00 9C 9C 00 4E 50 60 root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0xe0 0x60 0x9c 0x9c 0x0 3 9C 9C 00 10 39 60 00 9C 9C 00 root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0xe0 0x60 0x9c 0x9c 0x0 4 9C 9C 00 10 39 60 00 9C 9C 00 root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0xe0 0x60 0x9c 0x9c 0x0 5 9C 9C 00 10 39 60 00 9C 9C 00 root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0xe0 0x60 0x9c 0x9c 0x0 6 9C 9C 00 10 39 60 00 9C 9C 00 40 root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x0 0x10 0xe0 0x60 0x9c 0x9c 0x0 7 9C 9C 00 10 39 60 00 9C 9C 00 40 2. Check CL BIC I2C scan command. - Before fix root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 0 9C 9C 00 42 root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 1 9C 9C 00 42 root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 2 9C 9C 00 80 90 92 94 A8 D4 E2 root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 3 9C 9C 00 2C root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 4 9C 9C 00 10 88 D2 root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 5 9C 9C 00 18 50 6E C0 C4 EC root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 6 9C 9C 00 A0 B0 root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 7 9C 9C 00 20 root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 8 9C 9C 00 40 root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 9 9C 9C 00 - After fix root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 0 9C 9C 00 42 root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 1 9C 9C 00 80 90 92 94 A8 D4 E2 root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 2 9C 9C 00 2C root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 3 9C 9C 00 10 88 D2 root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 4 9C 9C 00 18 50 6E C0 C4 EC root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 5 ^[[A9C 9C 00 A0 B0 root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 6 9C 9C 00 20 root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 7 9C 9C 00 40 root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 8 9C 9C 00 root@bmc-oob:~# bic-util slot1 0xe0 0x60 0x9c 0x9c 0x0 9 9C 9C 00
Summary: - Change bus of I2C master write read from 1-base to 0-base. - Fix read/write invalid I2C bus causes BIC hang problem. Test plan: - Build Code: Pass - I2C Master Write Read: Pass Log: 1. Check I2c master write read command. - Read CL BIC bus 4 address 0xC4 * Before change (1-base) root@bmc-oob:~# bic-util slot1 0x18 0x52 0x09 0xC4 0x02 0x8B BIC no response! root@bmc-oob:~# bic-util slot1 0x18 0x52 0x0B 0xC4 0x02 0x8B 77 04 * After change (0-base) root@bmc-oob:~# bic-util slot1 0x18 0x52 0x09 0xC4 0x02 0x8B 76 04 root@bmc-oob:~# bic-util slot1 0x18 0x52 0x0B 0xC4 0x02 0x8B BIC no response! - Read BB BIC bus 2 address 0x4E * Before change (1-base) root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x00 0x10 0x18 0x52 0x05 0x4E 0x01 0x01 9C 9C 00 10 07 52 83 root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x00 0x10 0x18 0x52 0x07 0x4E 0x01 0x01 9C 9C 00 10 07 52 00 C3 * After change (0-base) root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x00 0x10 0x18 0x52 0x05 0x4E 0x01 0x01 9C 9C 00 10 07 52 00 C3 root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x00 0x10 0x18 0x52 0x07 0x4E 0x01 0x01 9C 9C 00 10 07 52 83
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Dependency: #249 |
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@GoldenBug has imported this pull request. If you are a Meta employee, you can view this diff on Phabricator. |
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Summary: fby3.5: common: Change I2C master w/r to 0-base - Change bus of I2C master write read from 1-base to 0-base. - Fix read/write invalid I2C bus causes BIC hang problem. Pull Request resolved: #256 Test Plan: - Build Code: Pass - I2C Master Write Read: Pass Log: 1. Check I2c master write read command. - Read CL BIC bus 4 address 0xC4 * Before change (1-base) root@bmc-oob:~# bic-util slot1 0x18 0x52 0x09 0xC4 0x02 0x8B BIC no response! root@bmc-oob:~# bic-util slot1 0x18 0x52 0x0B 0xC4 0x02 0x8B 77 04 * After change (0-base) root@bmc-oob:~# bic-util slot1 0x18 0x52 0x09 0xC4 0x02 0x8B 76 04 root@bmc-oob:~# bic-util slot1 0x18 0x52 0x0B 0xC4 0x02 0x8B BIC no response! - Read BB BIC bus 2 address 0x4E * Before change (1-base) root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x00 0x10 0x18 0x52 0x05 0x4E 0x01 0x01 9C 9C 00 10 07 52 83 root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x00 0x10 0x18 0x52 0x07 0x4E 0x01 0x01 9C 9C 00 10 07 52 00 C3 * After change (0-base) root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x00 0x10 0x18 0x52 0x05 0x4E 0x01 0x01 9C 9C 00 10 07 52 00 C3 root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x00 0x10 0x18 0x52 0x07 0x4E 0x01 0x01 9C 9C 00 10 07 52 83 Reviewed By: garnermic Differential Revision: D35820089 Pulled By: GoldenBug fbshipit-source-id: f682a645f933cd01a7e1bc0a617c49acca6187b0
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Summary: fby3.5: common: Change I2C master w/r to 0-base - Change bus of I2C master write read from 1-base to 0-base. - Fix read/write invalid I2C bus causes BIC hang problem. Pull Request resolved: #256 Test Plan: - Build Code: Pass - I2C Master Write Read: Pass Log: 1. Check I2c master write read command. - Read CL BIC bus 4 address 0xC4 * Before change (1-base) root@bmc-oob:~# bic-util slot1 0x18 0x52 0x09 0xC4 0x02 0x8B BIC no response! root@bmc-oob:~# bic-util slot1 0x18 0x52 0x0B 0xC4 0x02 0x8B 77 04 * After change (0-base) root@bmc-oob:~# bic-util slot1 0x18 0x52 0x09 0xC4 0x02 0x8B 76 04 root@bmc-oob:~# bic-util slot1 0x18 0x52 0x0B 0xC4 0x02 0x8B BIC no response! - Read BB BIC bus 2 address 0x4E * Before change (1-base) root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x00 0x10 0x18 0x52 0x05 0x4E 0x01 0x01 9C 9C 00 10 07 52 83 root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x00 0x10 0x18 0x52 0x07 0x4E 0x01 0x01 9C 9C 00 10 07 52 00 C3 * After change (0-base) root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x00 0x10 0x18 0x52 0x05 0x4E 0x01 0x01 9C 9C 00 10 07 52 00 C3 root@bmc-oob:~# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x00 0x10 0x18 0x52 0x07 0x4E 0x01 0x01 9C 9C 00 10 07 52 83 Reviewed By: garnermic Differential Revision: D35941594 Pulled By: GoldenBug fbshipit-source-id: fccc827e6cfcca34b6921e32f2a8bebfae1a8250
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fby3.5: common: Change I2C master w/r to 0-base
Summary:
Test plan:
Log:
Before change (1-base)
root@bmc-oob:
# bic-util slot1 0x18 0x52 0x09 0xC4 0x02 0x8B# bic-util slot1 0x18 0x52 0x0B 0xC4 0x02 0x8BBIC no response!
root@bmc-oob:
77 04
After change (0-base)
root@bmc-oob:
# bic-util slot1 0x18 0x52 0x09 0xC4 0x02 0x8B# bic-util slot1 0x18 0x52 0x0B 0xC4 0x02 0x8B76 04
root@bmc-oob:
BIC no response!
Before change (1-base)
root@bmc-oob:
# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x00 0x10 0x18 0x52 0x05 0x4E 0x01 0x01# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x00 0x10 0x18 0x52 0x07 0x4E 0x01 0x019C 9C 00 10 07 52 83
root@bmc-oob:
9C 9C 00 10 07 52 00 C3
After change (0-base)
root@bmc-oob:
# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x00 0x10 0x18 0x52 0x05 0x4E 0x01 0x01# bic-util slot1 0xe0 0x2 0x9c 0x9c 0x00 0x10 0x18 0x52 0x07 0x4E 0x01 0x019C 9C 00 10 07 52 00 C3
root@bmc-oob:
9C 9C 00 10 07 52 83