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Icetea: qsfp_service: DR2_4x400G,DR1_8x200G,DR1_8x100G optics support#557

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Icetea: qsfp_service: DR2_4x400G,DR1_8x200G,DR1_8x100G optics support#557
joywu-coder wants to merge 4 commits into
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joywu-coder:icetea_qsfp_new_modes_support

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@joywu-coder

@joywu-coder joywu-coder commented Sep 22, 2025

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Description

Add codes to support the new DR2_4x400G, DR1_8x200G, and DR1_8x100G modes for Icetea QSFP service.

  1. Add new profile PROFILE_100G_1_PAM4_RS544X2N_OPTICAL = 54 to switch_config.thrift.
  2. Add codes to support the new DR2_4x400G, DR1_8x200G, and DR1_8x100G modes.
  3. Change QSFP_HW_TEST codes to support the verification of the three new modes.
  4. Change kUsecDatapathStateUpdateTime to 10s(actual test needs 7~8s) to release the lanes from DeInit, fix the error print: "E0919 17:16:58.348301 28340 CmisModule.cpp:3906] Transceiver 0: Datapath didn't come out of deactivated state even after waiting 5000000 uSec".

Motivation

According to the requirement change, Icetea QSFP service needs to support the new DR2_4x400G, DR1_8x200G, and DR1_8x100G modes.

image

Test Plan

Test cases will cover the following modes:

  • 2 x 800G: 2 logical ports, each port contains 4 lanes and 200G per lane.
    ---->SMFMediaInterfaceCode: DR4_800G = 0x77
    ---->PROFILE_800G_4_PAM4_RS544X2N_OPTICAL = 52
  • 2 x 400G: 2 logical ports, each port contains 4 lanes and 100G per lane.
    ---->SMFMediaInterfaceCode: DR4_400G = 0x1C
    ---->PROFILE_400G_4_PAM4_RS544X2N_OPTICAL = 38
  • 4 x 400G: 4 logical ports, each port contains 2 lanes and 200G per lane.
    ---->SMFMediaInterfaceCode: DR2_400G = 0x75
    ---->PROFILE_400G_2_PAM4_RS544X2N_OPTICAL = 51
  • 8 x 200G: 8 logical ports, each port contains 1 lane and 200G per lane.
    ---->SMFMediaInterfaceCode: DR1_200G = 0x73
    ---->PROFILE_200G_1_PAM4_RS544X2N_OPTICAL = 53
  • 8 x 100G: 8 logical ports, each port contains 1 lane and 100G per lane.
    ---->SMFMediaInterfaceCode: DR1_100G = 0x14
    ---->PROFILE_100G_1_PAM4_RS544X2N_OPTICAL = 54

Test steps as follows:

  1. Compilation has passed for qsfp_hw_test, qsfp_service, and fboss-platform-mapping-gen

  2. Run "fboss-platform-mapping-gen --platform-name icetea800bc" can generate the platform_mapping configs with the new profile "PROFILE_100G_1_PAM4_RS544X2N_OPTICAL = 54".
    icetea800bc_platform_mapping_53-54-51-38-52.json

  3. Transceivers deploy in the front panel:
    Ports 1-18: 18 Finisar optical modules.
    Ports 19-32: 14 Terahop(Innolight) optical modules.
    Port 33: 1 Innolight QSFP28.

  4. QSFP Hardware Test Config:
    Ports 1-4: PROFILE_200G_1_PAM4_RS544X2N_OPTICAL = 53.
    Ports 5-8: PROFILE_100G_1_PAM4_RS544X2N_OPTICAL = 54.
    Ports 9-12: PROFILE_400G_2_PAM4_RS544X2N_OPTICAL = 51.
    Ports 13-16: PROFILE_400G_4_PAM4_RS544X2N_OPTICAL = 38.
    Ports 17-32: PROFILE_800G_4_PAM4_RS544X2N_OPTICAL = 52.
    Port 33(QSFP28): PROFILE_100G_4_NRZ_RS528_OPTICAL = 23.
    qsfp_profile_53-54-51-38-52_all_ports_conf.txt

  5. Run 0.7.2 t0_qsfp_hw_tests, the result passed:
    ./bin/run_test.py qsfp --qsfp-config ./qsfp_profile_53-54-51-38-52_all_ports.conf --platform_mapping_override_path ./icetea800bc_platform_mapping_53-54-51-38-52.json --filter_file=./share/hw_sanity_tests/t0_qsfp_hw_tests.conf --skip-known-bad-tests "icetea800bc/physdk-credo-0.7.2/credo-0.7.2"

image
  1. Run 0.7.2 100% QSFP HW tests, the result passed:
    ./bin/run_test.py qsfp --qsfp-config ./qsfp_profile_53-54-51-38-52_all_ports.conf --platform_mapping_override_path ./icetea800bc_platform_mapping_53-54-51-38-52.json --skip-known-bad-tests "icetea800bc/physdk-credo-0.7.2/credo-0.7.2"
image
  1. Run 0.9.0 t0_qsfp_hw_tests, the result passed:
    ./bin/run_test.py qsfp --qsfp-config ./qsfp_profile_53-54-51-38-52_all_ports.conf --platform_mapping_override_path ./icetea800bc_platform_mapping_53-54-51-38-52.json --filter_file=./share/hw_sanity_tests/t0_qsfp_hw_tests.conf --skip-known-bad-tests "icetea800bc/physdk-credo-0.9.0/credo-0.9.0"
image
  1. Run 0.9.0 100% QSFP HW tests, the result passed:
    ./bin/run_test.py qsfp --qsfp-config ./qsfp_profile_53-54-51-38-52_all_ports.conf --platform_mapping_override_path ./icetea800bc_platform_mapping_53-54-51-38-52.json --skip-known-bad-tests "icetea800bc/physdk-credo-0.9.0/credo-0.9.0"
image
  1. Please refer to the detailed logs in GDrive: https://drive.google.com/drive/folders/1tJns4Vmogfe0g7Fu5BgN66uTV47xWrAs

Test result for the commit: 920a04e

  1. Run 0.7.2 t0_qsfp_hw_tests, the result passed:
image 2. Run 0.7.2 100% QSFP HW tests, the result passed: image

Please refer to the new logs in GDrive: https://drive.google.com/drive/folders/1seDPes3BA5gnPuzrPwI65AKtpCEV68sX

@meta-cla meta-cla Bot added the CLA Signed label Sep 22, 2025
Comment thread fboss/agent/switch_config.thrift Outdated
PROFILE_400G_2_PAM4_RS544X2N_OPTICAL = 51,
PROFILE_800G_4_PAM4_RS544X2N_OPTICAL = 52,
PROFILE_200G_1_PAM4_RS544X2N_OPTICAL = 53,
PROFILE_100G_1_PAM4_RS544X2N_OPTICAL = 54,

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Can we reuse PROFILE_100G_1_PAM4_RS544_OPTICAL instead of defining another new profile?

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Can we reuse PROFILE_100G_1_PAM4_RS544_OPTICAL instead of defining another new profile?

Yes, using PROFILE_100G_1_PAM4_RS544_OPTICAL = 47 can work as well. We originally thought the "FEC RS544X2N" for 100G should be supported, too.

Comment on lines +232 to +236
DR2_400G = 27,
DR2_4x400G = 28
DR1_8x200G = 29,
DR1_100G = 30,
DR1_8x100G = 31,

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We only need DR2_400G and DR1_100G here

DR2_4x400G is DR2_400G media interface code on lanes 0,2,4,6. Similarly for the other modes

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We only need DR2_400G and DR1_100G here

DR2_4x400G is DR2_400G media interface code on lanes 0,2,4,6. Similarly for the other modes

Got it, thanks.

SMFMediaInterfaceCode::LR4_10_400G,
SMFMediaInterfaceCode::LR4_10_400G,
},
/* new requirement not supoort the two combinations

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Please keep this section and not comment out. While not a supported mode on Icetea right now, we may still support it on other platforms

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Please keep this section and not comment out. While not a supported mode on Icetea right now, we may still support it on other platforms

Got it, thanks.

Comment on lines +2963 to +2974
} else if (
smfCode == SMFMediaInterfaceCode::DR2_400G &&
firstModuleCapability->hostStartLanes.size() == 4) {
moduleMediaInterface = MediaInterfaceCode::DR2_4x400G;
} else if (
smfCode == SMFMediaInterfaceCode::DR1_200G &&
firstModuleCapability->hostStartLanes.size() == 8) {
moduleMediaInterface = MediaInterfaceCode::DR1_8x200G;
} else if (
smfCode == SMFMediaInterfaceCode::DR1_100G &&
firstModuleCapability->hostStartLanes.size() == 8) {
moduleMediaInterface = MediaInterfaceCode::DR1_8x100G;

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We don't need these changes.

moduleMediaInterface corresponds to the SMF code corresponding to the first Application that module advertises and not the speed we configure on it. In the 2x800G-DR4 case, the module always advertises 800G-DR4 on lanes 0 and 2. The code in lines 2960-2962 already checks this.

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We don't need these changes.

moduleMediaInterface corresponds to the SMF code corresponding to the first Application that module advertises and not the speed we configure on it. In the 2x800G-DR4 case, the module always advertises 800G-DR4 on lanes 0 and 2. The code in lines 2960-2962 already checks this.

Got it, thanks.

}
break;
case MediaInterfaceCode::DR2_400G:
expectedMediaLanes = {0, 1};

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expectedMediaLane depends on hostLane right?
If hostLane is 0,1 expectedMediaLanes = {0,1}
If hostLane is 2,3 expectedMediaLanes = {2,3}
If hostLane is 4,5 expectedMediaLanes = {4,5}
If hostLane is 6,7 expectedMediaLanes = {6,7}

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expectedMediaLane depends on hostLane right? If hostLane is 0,1 expectedMediaLanes = {0,1} If hostLane is 2,3 expectedMediaLanes = {2,3} If hostLane is 4,5 expectedMediaLanes = {4,5} If hostLane is 6,7 expectedMediaLanes = {6,7}

Yes, I have handled the mapping in the switch case "MediaInterfaceCode::DR4_2x800G" and the sub switch case "cfg::PortProfileID::PROFILE_400G_2_PAM4_RS544X2N_OPTICAL".

Comment on lines +760 to +762
*mediaIntfCode == MediaInterfaceCode::DR2_4x400G ||
*mediaIntfCode == MediaInterfaceCode::DR1_8x200G ||
*mediaIntfCode == MediaInterfaceCode::DR1_8x100G ||

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Not required, as this switch case is on moduleMediaInterface which is always DR4_2x800G

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Not required, as this switch case is on moduleMediaInterface which is always DR4_2x800G

Got it, thanks.

Comment on lines +743 to +745
*mediaIntfCode == MediaInterfaceCode::DR2_4x400G ||
*mediaIntfCode == MediaInterfaceCode::DR1_8x200G ||
*mediaIntfCode == MediaInterfaceCode::DR1_8x100G ||

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Not required, as this switch case is on moduleMediaInterface which is always DR4_2x800G

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Not required, as this switch case is on moduleMediaInterface which is always DR4_2x800G

Got it, thanks.

@shiva-menta

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@joywu-coder Can you let us know once you've tested with these new code changes?

@joywu-coder

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@joywu-coder Can you let us know once you've tested with these new code changes?

@shiva-menta Yes, it has been verified. The new logs are attached at the end of the description. Please check. Thank you.

@facebook-github-bot

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@shiva-menta has imported this pull request. If you are a Meta employee, you can view this in D83347793.

@facebook-github-bot

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@shiva-menta merged this pull request in 49a2778.

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