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  • add VregShiftExtend and new shift opcodes so ARM can encode shifted/extended GPR operands directly
  • wire the new operand through printers, visitors, copy-prop, register allocation, and metadata
  • tighten the ARM emitter and simplifier: reuse toOperand(), add folding for ALU/test ops, and guard the lea fold against illegal scales
 - add VregShiftExtend and new *shift* opcodes so ARM can encode shifted/extended GPR operands directly
 - wire the new operand through printers, visitors, copy-prop, register allocation, and metadata
 - tighten the ARM emitter and simplifier: reuse toOperand(), add folding for ALU/test ops, and guard the lea fold against illegal scales
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meta-codesync bot commented Nov 14, 2025

@facebook-github-bot has imported this pull request. If you are a Meta employee, you can view this in D87067693. (Because this pull request was imported automatically, there will not be any future comments.)

@charles-typ
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Hi @igogo-x86, we are hitting merge conflict in vasm-simplify-arm.cpp, can you help rebase and resubmit, thank you!

@charles-typ
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Hey @igogo-x86, gentle reminder on this, thank you!

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