KiCAD MCP is a Model Context Protocol (MCP) implementation that enables Large Language Models (LLMs) like Claude to directly interact with KiCAD for printed circuit board design.

Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.

A markup-based typesetting system that is powerful and easy to learn.

Embedded Wi-Fi Host Driver that provides a set of APIs to interact with Cypress WLAN chips

DMTF's Reference Implementation of SPDM

KiCAD 9.0 设计 i.MXRT 板卡

Create ridiculously fast Lexers

Define compiler intermediate representation usable by external tools

Platform-independent drivers for STMicroelectronics MEMS motion and environmental sensors, based on Rust Programming Language

Rust support for the open-source NEORV32 RISC-V microcontroller.

PoC/Proposal for modularizing the popular Rust RTIC a modular framework and add multi-core support. In addition to implementing multi-core reference distributions for the RP2040 and an stm32-based …

Package manager and build system for VHDL, Verilog, and SystemVerilog

This library provides access to STM32 peripherals in Rust.

noshell, a no_std argument parser and a shell for constrained systems.

Low level access to ARM Aarch32 (Cortex-R and Cortex-A) processors

EDHOC implemented in Rust, optimized for microcontrollers, with bindings for C and Python.

Cortex M SWO SWV Demux and Postprocess (Software)

ENET driver for i.MX RT MCUs

A Software Framework for Neuromorphic Computing

Handles loading ELF files into the Neotron OS

DORA (Dataflow-Oriented Robotic Architecture) is middleware designed to streamline and simplify the creation of AI-based robotic applications. It offers low latency, composable, and distributed dat…

Rust Peripheral Access Crate for NXP MCX series MCUs

Debug and parallel trace hardware for CORTEX-M (FPGA + support code)

We all edit.

Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.

Cranelift based backend for rustc

Minimax: a Compressed-First, Microcoded RISC-V CPU

An extremely fast Python package and project manager, written in Rust.