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1. continue_with_sv continue_with_sv Public

   Software and resources to help Purdue students (and others) continue developing with SystemVerilog after losing access to proprietary tools.

   Makefile 16 2

2. caravel_user_project caravel_user_project Public

   Forked from efabless/caravel_user_project

   https://caravel-user-project.readthedocs.io

   Verilog 3 1

3. PurdueElectricRacing/LapSim PurdueElectricRacing/LapSim Public

   Lap Simulation in Matlab

   MATLAB 4 1

4. ASCON_code-a-chip ASCON_code-a-chip Public

   ASCON implementation for IEEE SSCS Code a Chip

   Jupyter Notebook

5. 270Computer 270Computer Public

   Generate UART output code from plain text file

   C 1

6. OpenDT OpenDT Public

   Simple FSAE Electric Drivetrain Design Tool

   Python 6