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🛡️ AEGIS-V: Hardware-Enforced Security Mesh

Backend-Go Frontend-Python Hardware-Assembly Python Embedded License

AEGIS-V is a high-integrity security gateway that implements Clean Architecture to bridge high-level cloud dashboards with low-level hardware root-of-trust.


📖 Project Overview

Modern security often fails because it stays strictly in the software layer. AEGIS-V moves the "Secret" to a physical Smart Endpoint. Using a Dumb Pipe philosophy for communication, the system ensures that business rules and cryptographic decisions are made at the edges (Hardware and Core Logic), keeping the transmission layer simple and secure.

How it Works:

  1. The User triggers a request via the Python SOC Dashboard.
  2. The Go Gateway (using Gin) acts as an Interface Adapter, converting the request into a cryptographic challenge.
  3. The Hardware (Smart Producer) receives the challenge, processes it via an Assembly Cipher, and decides if the physical lock (Solenoid) should be actuated.
  4. Clean Architecture ensures that the core security rules are decoupled from the frameworks, allowing the system to run on different hardwares or cloud providers seamlessly.

🛠️ Prerequisites & Requirements

Software Requirements

  • Go: v1.20 or higher.
  • Python: v3.9 or higher.
  • C++ Compiler: PlatformIO or Arduino IDE (for firmware deployment).
  • Git: To clone and manage the repository.

Hardware Requirements (Physical Mode)

  • Microcontroller: ATmega328P (Arduino Uno, Nano, or Pro Mini).
  • Interface: MOSFET IRF540N (for electromechanical triggering).
  • Actuator: 5V/12V Solenoid or simple LED for status verification.
  • Pinout: Digital Pin 12 (PB4) for output signal.

🏗️ System Architecture

Our implementation follows the Clean Architecture circles to ensure maintainability and security:

  • Entities: Pure Domain Objects representing sensor measurements and security states.
  • Use Cases: Physical simulation logic and anomaly detection criteria.
  • Interface Adapters: Go Gin routes and Python Streamlit connectors that translate external data to the Core.
  • Frameworks & Drivers: The actual Hardware (ATmega328P), HTTP engine (Gin), and UI (Streamlit).

📸 Visual Showcase

1. General System Schematic

GSS

Description: A global view of the interaction between Clean Architecture layers and physical electromechanical components.

2. Operational SOC Dashboard

OSD

Description: Main interface for the Security Operations Center, featuring dark-mode industrial aesthetics.

3. Hardware Telemetry & Entropy Analysis

HTEA

Description: Real-time Plotly charts monitoring hardware signal stability and side-channel entropy.

4. System Operation Demo

Demo do site

Description: Dynamic feature matrix and live handshake demonstration.


🔧 Installation Manual

Ambiente Automatizado (Recomendado via Docker)

A forma mais ágil de iniciar todo o sistema (Backend, Simulador HW e Dashboard) é utilizando o Docker Compose.

  1. Requisitos: Docker e Docker Compose instalados.
  2. Na raiz da pasta Aegis-V-Core, inicie os serviços:
    docker-compose up --build
  3. Acesse o Dashboard em: http://localhost:8501
  4. A API Gateway estará operante em: http://localhost:8080

Configuração Manual (Desenvolvimento)

Caso prefira rodar os serviços localmente sem contêineres:

Requisitos do Sistema

  • Go: v1.21+ (para rodar o Backend e o Simulador)
  • Python: v3.10+ e Poetry (para rodar o Dashboard Python/Streamlit)
  • C++ Compiler: PlatformIO ou Arduino IDE (para deploy no hardware real)
  • Make (para comandos automatizados no Unix/Linux/WSL)

1. Backend Engine & Simulador

  1. Entre na pasta base: cd Aegis-V-Core
  2. Utilize o Makefile para instalar dependências do Go e rodar:
    make run-backend
    make run-simulator

2. Frontend SOC Setup (UI Layer)

O dashboard utiliza Poetry para gestão consistente de dependências.

  1. Navegue até a pasta do dashboard:
    cd Aegis-V-Core/dashboard
  2. Instale as dependências usando o Poetry:
    poetry install
  3. Inicie o dashboard:
    poetry run streamlit run app.py

3. Firmware Deployment (Hardware Layer)

  1. Navegue até Aegis-V-Core/firmware.
  2. Abra o projeto na sua IDE preferida.
  3. Conecte o hardware (ATmega328P) via USB e faça o Flash. Pin 12 (PB4) é usado para o controle físico.

🧪 Testing & Verification

To ensure the system is correctly configured, follow these steps:

  1. API Check: Open your browser and go to http://localhost:8080/api/health. You should receive a {"status": "online"} response.
  2. Handshake Test: On the Dashboard, click "INITIALIZE MCP HANDSHAKE".
    • The "Authorized" status should turn green.
    • The log terminal should record the specific hex code returned by the Assembly core.
  3. Graph Interaction: Hover over the Entropy Chart. You can use the Plotly toolbar to zoom in on signal peaks or reset the view.

💻 Exemplos de Output (Logs e API)

Terminal: Inicialização do Backend

[GIN-debug] GET    /api/health               --> aegis/backend/routes.HealthCheck
[GIN-debug] POST   /api/handshake            --> aegis/backend/routes.InitiateHandshake
[AEGIS-CORE] 🛡️ Backend Engine initialized on port 8080
[AEGIS-CORE] 🔄 Connecting to Hardware Simulator on :8081... Success.

Rota JSON: Exemplo de Handshake Bem-Sucedido (POST /api/handshake)

{
  "status": "authorized",
  "hardware_id": "0x7F-AEGIS",
  "entropy_level": 0.984,
  "handshake_latency_ms": 12.4,
  "message": "Physical lock actuated successfully."
}

🛠️ Implementation Details

  • Zero-Trust: No request is trusted without a physical hardware handshake.
  • Concurrency: Go routines manage multiple hardware nodes simultaneously.
  • Low-Level Mastery: Cryptographic rounds implemented in** AVR Assembly** to prevent side-channel timing attacks.
  • Electromechanics: Real-time MOSFET thermal tracking and solenoid pulse-width modulation (PWM).

👤 Author

Developed by zckLab "Securing the digital world by anchoring it in the physical reality."