590 questions
3
votes
3
answers
138
views
aarch64 b.nv (branch never) is always taken (acts as b.al)
I am working on an aarch64 Neoverse N3 CPU, and noticed that whenever I execute b.nv it is actually always taken. I execute this code inside a kernel module on Linux, at EL1.
Has anybody ever ...
- 151
2
votes
1
answer
203
views
What is the difference between "hlt" and "jmp $" in x86 assembly
Both hlt and jmp $ seem to halt the CPU when executed, so what is the difference?
- 85
2
votes
1
answer
79
views
Why is my 6502 program crashing when writing to $0200?
Every time I have a program that writes to $0200, the program crashes.
I'm trying to write a byte to memory address $0200.
I'm using a standard emulator (I've tried VICE for C64 and another generic ...
- 23
-2
votes
1
answer
124
views
CMP , DIV & MUL Questions
Last month I started to learn how to use Cheat Engine to script with zero knowledge and some things are not clear to me. My objective was to create a defense boost by dividing the damage taken by ...
1
vote
1
answer
585
views
What is the difference between Processor Status Word (PSW) and Program Status Word (PSW)?
As per Oxford dictionary;
Program Status Word
A collection of information that encapsulates the basic execution state of a program at any instant. It permits an interrupted process to resume ...
- 47
0
votes
0
answers
74
views
Sequence of instructions executed by CPU to retrieve data from NIC
In cases where no DMA is available for a peripheral device such as a Network Interface Card to directly send data from the onboard buffers to system memory, how is it handled? What sequence of ...
- 33
2
votes
1
answer
280
views
What does the "i" in COMISS / VUCOMISS stand for?
Currently I'm reading CS:APP 3rd edition, and I found the instructions a little bit verbose (in my view) like vucomiss, so I looked for the full name of the instruction to help memorizing.
I found the ...
- 21
1
vote
0
answers
52
views
Does movnt interact with lock-prefixed instructions?
I have an application that streams data using the movnt family of instructions for non-temporal write operations on regular (write-back) memory.
Then the data is handed off to a different thread for ...
- 15.6k
0
votes
0
answers
46
views
About Arudino zero (ARMV6-M) assembly principle
I know that PC jumps can be implemented using the B, BL, and BX instructions, such as
B loop_start ; jump to the loop_start label,
or
BX LR ; return from a subroutine
But I also learned that PC ...
2
votes
1
answer
175
views
How to determine default operand size for instruction decoding x86-64
I am currently trying my hand at writing a program that decodes x86-64 instructions into assembly, but I am stuck on determining the default memory/register operand size when dealing with instructions ...
- 23
0
votes
0
answers
109
views
problems with invalid key type and understanding instructions
I am not an experienced programmer. I'm currently teaching myself at home.
I find your instructions for recaptcha2 a bit complicated. I set up for recatcha2. When I am given the keys there are 2 ...
- 21
1
vote
0
answers
75
views
Unable to access mapped memory
Why can not access the memory after 0x010ff8
(gdb) br *0x0100e2
Breakpoint 1 at 0x100e2
(gdb) run
...
Breakpoint 1, 0x00000000000100e2 in ?? ()
(gdb) info proc mappings
process 2563326
Mapped address ...
- 4,837
1
vote
1
answer
663
views
GCC instruction scheduling: how do the algorithms differ?
GCC offers a number of options related to instruction scheduling in the compiler flags. An overview of what this means is on the GCC Wiki for "Instruction Scheduling", but this is well out ...
- 674
1
vote
1
answer
698
views
How does the label in an ADRP instruction work in arm64?
Im trying to figure out how ADRP works. I have this line of code:
0x100595c74 <+0>: adrp x17, 13159
My initial understanding of ADRP is that the program adds 0x100595c74 with an integer 13159 ...
- 25
-1
votes
2
answers
968
views
How to add conditional branch instruction without else option?
I am trying get my IR to look like below. Is it possible to achieve this in LLVM?
entry:
%2 = call i32 @func()
%3 = icmp ne i32 %2, 0, !dbg
br i1 %3, label %if.then.block
call void @abc()
ret ...
- 25