Joseph Boccuzzi

Interesting to be involved in this foresighting exercise around RF and Microwave skills. Think the last paragraph is key conveys the issue - ‘The report concludes with a clear warning: without immediate and coordinated action, the UK risks falling behind in deploying secure and resilient telecommunications infrastructure. The skills gap is not just a training issue—it’s a potential national capability bottleneck. The resilience, progress, and sovereignty of the UK’s telecoms sector depend on bridging this gap now.’ https://lnkd.in/ep_cAtxt

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Special Issue on Orthogonal Time Frequency Space (OTFS) Brought to you by IEEE Open Journal of Vehicular Technology Orthogonal Time Frequency Space (OTFS) modulation and Delay-Doppler (DD) signal processing is an emerging technology aimed at addressing challenges in hostile wireless communication environments. These environments include scenarios like mobile communications on aircraft, satellite communications, vehicle-to-vehicle communications, and underwater acoustic communications, where traditional modulation techniques like OFDM struggle due to severe delay and Doppler effects. OTFS modulation operates in the DD domain instead of the conventional time-frequency domain, offering advantages such as enhanced resilience against Doppler and delay effects, lower peak-to-average power ratio, reduced signaling overhead, and robustness against synchronization errors. It is considered a promising technology for 6G wireless systems. We are very happy to have a few leading researchers in this research area, namely Qin Tao (Hangzhou Normal University), shuangyang li (Technical University of Berlin), Weijie Yuan (Southern University of Science and Technology), Slawomir Stanczak (Fraunhofer Heinrich Hertz Institute), Emanuele Viterbo (Monash University), and Xianbin Wang (Western University), to publish a special issue in our journal, IEEE Open Journal of Vehicular Technology, that emphasizes the importance of OTFS modulation and DD signal processing in advancing wireless communication technologies, particularly for 6G systems, and encourages further research in this field. https://lnkd.in/e_7-xngt The special issue features five articles covering various aspects of OTFS: a) Performance Evaluation: Proposes a novel framework for evaluating OTFS system performance using multiple indicators: https://lnkd.in/e8s7M43M b) Channel Coding: Introduces a hybrid coding scheme combining LDPC and Hadamard codes to improve performance in high-mobility scenarios: https://lnkd.in/eiHyed6B c) Real-World Applications: Explores OTFS in adaptive cruise control systems and symbiotic radio systems, leveraging deep learning and reinforcement learning for improved functionality: https://lnkd.in/eqq-VnG2 https://lnkd.in/eFSMTS3X d) Integration with 6G Technology: Surveys the use of reconfigurable intelligent surfaces (RIS) in OTFS systems, discussing advancements, challenges, and future directions.  https://lnkd.in/eZXeTUgJ We hope you can enjoy the articles of this special issue! #ieee #ieeevts #journal #openaccess #peerreview #mobile #otfs #signalprocessing #6G #ris #irs IEEE Vehicular Technology Society IEEE

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*** New To Chiplets World: What I’d Focus On *** As a new engineer entering the world of chiplets, the learning curve is steep, but there are three areas I’d focus on first: 1.Understanding the interconnects. The core of chiplet-based SoCs is the inter-chiplet communication.Whether it’s UCIe, BoW, EMIB, or any other protocol, understanding how data moves between chips is crucial. If you don’t get how chiplets communicate, you won’t understand how your design will work in a multi-die system. 2.System-level thinking. Chiplet designs aren’t about optimizing individual chips—they’re about creating a coherent system. As a new engineer, it’s essential to look beyond the chiplet’s boundary and think about how your piece fits into the larger architecture. Understanding power, thermal, & communication interactions is key. 3.Verification from the start. The hardest issues with chiplets often surface at integration. Focus on building verification strategies early—both at the individual chipletlevel and in the full-chip system. A deep understanding of how chiplets interact will be your biggest asset. If you were starting fresh in the chiplet world, what would you prioritize?

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Publication: Open Journal of the Solid-State Circuits Society Article: Recent Advances of High-Speed Short-Reach Optical Interconnects for Data Centers Authors: Chongyun Zhang; Fuzhan Chen; Li Wang; Lin Wang; C. Patrick Yue Editor's Comments: Covering recent design challenges and advances of optical transceivers, PLLs, and CDRs for ~100m-distance data center applications Read here: https://bit.ly/45mKIwS #ArticleSpotlight #SSCL #EditorsPick #SSCS #IEEE

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Y. Jay Guo, C. A. Guo, M. Li, and M. Latva-aho presents an overview on the main features and functionalities of the upcoming 6G that have direct implications on antenna technologies. Read it at: https://lnkd.in/dfepEBDN #ieee #ieeeap #ieeeaps #6G #antenna #technologies

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This article explores the performance of a Yagi-Uda patch antenna with Koch fractal geometry of different orders on an FR-4 substrate. It exhibits multiband operation, enabling the use across multiple frequency bands. The proposed reflector features equally spaced slots. The radiating dipole element has a Koch fractal geometry of order 2, while the third directive element of the antenna is shaped as a Koch fractal of order 1. The antenna was designed and simulated using CST Studio® from 1 GHz to 10 GHz. After fabrication, measurements with a vector network analyzer (VNA) verified the presence of 11 operational bands with resonance frequencies centered at 1.265 GHz, 1.545 GHz 2.59 GHz, 2.7 GHz, 3.05 GHz, 3.9 GHz, 5 GHz, 5.18 GHz, 5.71 GHz, 6.20 GHz, and 8.72 GHz. It results in an aggregate bandwidth of 652 MHz (Ultra-Wideband, UWB) with applications in a range of protocols and technologies. The antenna dimensions are only 100 mm x 120 mm, resulting in a compact size. Link avalable in: https://lnkd.in/dCxDR42K #SBMO #JMOe

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Reconfigurable Intelligent Surfaces (RIS) are rapidly becoming one of the hottest research directions in wireless communications. RIS is envisioned as a key enabler for 6G networks, offering “second-line-of-sight” and many other exciting possibilities for future telecom systems. At KAUST IMPACT Lab, in close collaboration with Ericsson Research (Behrooz Makki), our team (Yiming Yang, Ruiqi Wang, Mohammad Vaseem, PhD Vaseem) has been investing deeply in RIS hardware innovations. Here is a summary of our contributions that tackle the most critical RIS challenges: 🔹 Wideband 1-bit 5G mm-Wave RIS hardware (IEEE TAP, 2024) For the first time, we demonstrated a 1-bit wideband RIS that covers the entire 5G n257 and n258 bands—while maintaining stable phase and magnitude over such wide frequencies. This work became an IEEE Xplore featured article and was the most dowloaded paper in IEEE TAP throughout 2024 (> 20,000 downloads).  https://lnkd.in/eiWNqhuR 🔹 Wideband 2-bit 5G mm-Wave RIS hardware (IEEE TAP, 2025) Our 1-bit RIS suffers from high sidelobes in the near field and quantization lobe in the far field, affecting wireless link quality. To solve this, we designed a 2-bit wideband RIS, which significantly reduces sidelobe levels and improves beam control across the n258 band.  https://lnkd.in/eEG2vkvV 🔹 Fully printed wideband 5G mm-Wave RIS hardware (IEEE TMTT, 2025) RIS at mm-Wave typically relies on expensive semiconductor switches, driving fabrication costs into the thousands of dollars. Leveraging our group’s expertise in printing, we introduced the world’s first fully printed RIS with vanadium dioxide (VO₂) switches directly integrated into the metallic patterns through screen printing. This breakthrough achieves 10–20× cost reduction while still delivering competitive performance at 30 GHz. https://lnkd.in/eiTG_69i More to come on our RIS work soon….

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Several days after this writer posted about the lopsided market narrative related to co-packaged optics (please see: https://lnkd.in/eReYuVp8), there were a couple of references to the CEO of Nvidia, Jensen Huang, stating that such a solution is not inevitable, starting with a news article (https://lnkd.in/egyNwa92). The piece quotes a supposedly contemporaneous video on a social media site in which Jensen says the following to a press outlet about working with TSMC on silicon photonics: “It’s still several years away. We should stay with copper for as long as we can, and then after that, if we must, we’ll use SiPh.” (https://lnkd.in/eRPv9RDQ). It should be noted that there are couple of comments on the post, despite the August 2025 date, questioning the timing of the statement, and it does appear that the tape was made in January of 2025. It looks like he is in Taiwan for the New Year's event. Yet, the comments are still instructive. While signing autographs, Jensen is somewhat distracted, but he is obviously providing his frank view of the technology. In stark contrast, only a few months later, at GTC 2025, he has effusive praise for SiPh and CPO, with the targeted audience also involving investment analysts. To be fair, it could be asserted that in the first case, Jensen’s comment was only for the NVLink scale-up fabric. Nevertheless, it still provides insight into his actual expectations for CPO. There is the view that was notably expressed very well by Loi Nguyen, EVP Emeritus, Optics, at Marvell Technology at the Optica Executive Forum at OFC 2025 on scale-up that Nvidia will do everything possible to cramp more GPUs in a single rack with liquid cooling and other techniques to allow them to stay with copper. He also believes that the present CPO effort is on a noncritical path in scaling out on a switch platform in which the pluggable is the primary option -- and so, essentially agrees that it will take several years more for CPO to be ready. Such a timeframe would obviously conflict with Nvidia’s quite optimistic 2026 schedule for shipment. Thus, the business narrative for CPO itself will inexorably remain on a more solid foundation compared with the actual, past realities of engineers struggling over the years to get the solution to work. There will continue to be the basic challenges with production, testing, and dependability. 

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In his most recent piece Austin L. emphasizes the importance of developing an open chiplet ecosystem to encourage broader industry adoption of a true chiplet marketplace. The Arm Total Design ecosystem is a great example of what this future will look like - modular, standards-based, and interoperable. By leveraging a Chiplet System Architecture (CSA) and reusable IP via Neoverse Compute Subsystems (CSS), Arm is pioneering the shift to a multi-vendor chiplet ecosystem that accelerates innovation, enables broader scalability, and empowers customers with greater freedom of choice across the cloud, AI, and infrastructure computing landscapes. Shared standards, reusable components, and tight supply chain coordination - what more is there to say? A strong chiplet ecosystem is a win for everyone. 🧠 https://okt.to/ixFAV5

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Some of our Group's journal papers from the last 12 months: [1]        A Miniature Two‐/Four‐Port UWB Antenna With MIMO Characterization Having Three Stopbands and Pattern Diversity Useful for 5G/6G/WiFi‐6E IoT Mobile Devices [2]        Millimeter-Wave Conical Beam Antennas for Drone and Vehicle Communications [3]        Time-Modulated EM Skins for Integrated Sensing and Communications [4]        Pattern Reconfigurable Antenna Using Circular Grooved SIW for 5G Millimeter-Wave Communications [5]        Inkjet printed 3D architectures: from silver micropillar arrays and lattices to multimaterial metamaterials [6]        A Novel High-Gain Hexagonal Cavity-Backed MIMO SIW Antenna With 3-D Homogeneous Lens Loading at Ka Band [7]        Wideband end-fire antenna based on modulated grooved surface plasmon polaritons [8]        Air plasma sprayed multi-material composite coatings for enhanced light absorption and thermal emission [9]       Shrinking a gradient-index-lens antenna system with a spaceplate [10]     The influence of impact-induced damage on electromagnetic shielding behaviour of carbon fibre reinforced polymer composites All ~130 of my journal papers can be freely downloaded here: https://lnkd.in/d2-9i8m #Antennas #Metasurfaces

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In the late 1970s, Bell Labs pioneered a 32-bit CMOS microprocessor with advanced architectural features at a time when most of the industry was still focused on 8-bit designs and unproven fabrication techniques. The Bellmac-32 helped establish design principles and technologies—such as CMOS efficiency and support for Unix-style systems—that underpin virtually every modern processor in laptops and smartphones today. Despite being technologically ahead of its time, the chip never achieved widespread commercial success for AT&T. Shifting corporate strategy and a market that favored other architectures meant that Bell Labs’ groundbreaking work influenced the industry indirectly, rather than through mainstream adoption of their own product. https://lnkd.in/g4XwzGjp

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Texas isn’t just funding chips. It’s funding the architecture behind them. While federal CHIPS debates dominate headlines, Greg Abbott just deployed $4.16M to expand Arm’s Austin semiconductor lab unlocking $71M in private capital and 320 high-skill design jobs. This isn’t about fabrication capacity. It’s about design control in the AI era. Processor architecture influences every downstream supply chain. A single ISA decision can affect billions in silicon output. BREAKDOWN • $4.16M → $71M leverage → 17x capital multiplier • 320 engineering roles → talent moat vs other states • Failure-analysis labs → faster iteration, shorter design cycles The geopolitical angle is subtle. Manufacturing is visible power. Architecture is invisible dominance. Texas is signaling that IP and design velocity matter more than wafer count. In a world chasing fabs, Austin is chasing instruction sets. Are states better off funding fabs or funding the IP that drives them? #Semiconductor #ChipDesign #SupplyChain #Geopolitics #ProcessorArchitecture #AIChips #ManufacturingTech #TexasTech #SemiconductorJobs

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I'm thrilled to share that our latest paper (https://lnkd.in/euX8y_jW), "Optimized Split Computing Framework for Edge and Core Devices," co-authored with some brilliant colleagues, has been accepted for publication in IEEE Transactions on Vehicular Technology. The core idea is something I'm incredibly passionate about: enabling AI models to run efficiently on resource-constrained devices, like smartphones or IoT sensors. Instead of forcing the device to do all the work or offloading everything to the cloud, we propose an optimisation framework to intelligently 'split' the AI model's workload across the device, the edge, and the core network. The real innovation here isn't just splitting the compute, but how we decide where to split it. We devised a system that dynamically adapts to network conditions and hardware capabilities. This is a crucial step towards making our networks more resource-aware and efficient. We're moving beyond one-size-fits-all solutions and towards explainable orchestration for the AI-driven services of tomorrow. A big thank you to my co-authors for their collaboration on this exciting piece of research! #AI #5G #6G #EdgeComputing #SplitComputing #OperationsResearch #Innovation #IEEE #Telecommunications #MachineLearning

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