The SDIO interface requires 10ns slew rate on the clock signal edges, which means each edge requires an analog signal bandwidth of 35 MHz to transition fast enough, even if you used 1 Hz clock frequency.
The pull-ups are mandatory for compatibility with bus electrical specs, but on the other hand, internal pull-ups inside MCU could suffice. Check the specification. So basically, if you did not enable the pull-ups in your code, the bus doesn't have to work either. Drawing these resistors is a good idea, because if they are not needed, they can be left off the PCB, but if you need them and you don't have a place for them, the design does not have to work.
The series resistors may or may not be mandatory, as again the MCU has internal pin drive strength selection. If those settings are set to too weak or too strong in your software, again, the bus does not have to work. Drawing these resistors is a good idea, because if they are not needed, they can be replaced with 0R jumper resistors, but again if the design requires them and you don't have a place for them, the design does not have to work.
All the other suggestions are basic PCB design suggestions for keeping signal integrity on a high speed buses. I'd consider SDIO as a high speed bus.
The track impedance is important as the devices on bus are expecting to drive signals in a certain way into a certain known impedance to have good signal integrity. As 10ns slew rate means PCB tracks longer than 20cm are considered to require impedance matching, tracks shorter than this should not affect much, unless your clock slews faster and thus the tracks need to be shorter.
Avoiding vias is a good suggestion, as they are an impedance discontinuity and signals reflect off of them. They can be designed in a way that tries to match the impedance so they cause less disturbance. And if you use them in a way that leaves stubs, that also causes reflections. And it is best to have equal amount of vias on all wires to match the length of the wires so that signals on different wires arrive at the same time.
Which is why signals need to be equal length to avoid skew. Electrical buses have requirements how data signals must change in relation to clock edge so that they work stable. 100 mils is only 2.54mm, so on a 1.6mm boards a single via is a significant length mismatch unless considered to add to the signal length. Sometimes the clock signal requires different length to stransition correctly with data.
Tracks need to be short to not accumulate errors from not paying attention to engineer all the above sugwstions, but also because bus has a requirement for host to get data back from the device with certain alignment of the sent clock signal, so bus can't exceed a certain length. I recall some host chips recommended the traces to be 5cm maximum.
So none of the above are most important, some are mandatory if you don't even know what you require unless you measure it, and also when drawing the PCB, it makes no sense to implement only half of the rules that improve signals and ignore the other half which degrades the signals. So all high speed design rules are always important.
If you are thinking why the board you bought does not work well, it might be that the designer did not implement the high speed design rules well enough, as it is just a hobbyist board. Assuming your software configures the interface correctly for that hardware design.
