[Nexthop][NPI] "asic_config_v3" - Add icetea800bc platform#1261
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Implements `asic_config_v3` design described. In this PR, add platform configurations for `icetea800bc`. The generated output file is similar to `asic_config_v2` synced config except a few lines out-of-order: ``` $ diff fboss/lib/asic_config_v3/generated_asic_configs/icetea800bc_internal.yml ./fboss/lib/asic_config_v2/synced_asic_configs/icetea800bc.yml 1400d1399 < sai_stats_disable_mask: 0x800 1402,1404c1401 < l3_ecmp_member_secondary_mem_size: 8192 < l3_ecmp_member_first_lkup_mem_size: 8192 < dlb_quality_adjustment_default_value_select: 1 --- > sai_stats_disable_mask: 0x800 1412a1410,1412 > l3_ecmp_member_secondary_mem_size: 8192 > l3_ecmp_member_first_lkup_mem_size: 8192 > dlb_quality_adjustment_default_value_select: 1 ```
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Pre-submission checklist
pip install -r requirements-dev.txt && pre-commit installpre-commit runSummary
Implements
asic_config_v3design.In this PR, add platform configurations for
icetea800bc_internalvariant oficetea800bcplatform.After this commit the
asic_config_v3generator produces the following extra output filefboss/lib/asic_config_v3/generated_asic_configs/icetea800bc_internal.ymlTest Plan
The generated output file is similar to
asic_config_v2synced configexcept a few lines out-of-order:
Visual Diff to show that only a few lines are in different order out of
around 15k lines:
This PR is created on top of
so it contains diff from these PRs. When these PRs will merge, this PR will have a shorter diff.