I'm dealing with clock buffer and trying to determine how output levels depends on the input. I'm using information from the datasheet. Here is the table with information:
I don't understand the information in this table completely. We see that output high voltage is measured at the certain conditions. The supply voltage is VDD=Min=1.65. The input voltage is VIH or VIL. I don't understand that. I expect the output voltage to be measured at the certain input voltage.
A buffer for logic signals is very different from an analog amplifier.
With a logic buffer, you don't want the output voltage to depend on the input voltage; instead, you want it to output a logic high when the input is a logic high, and output a low when the input is low.
Therefore, the input specifications for the buffer indicate what voltage levels it considers to be high and low, and the output specifications indicate the capabilities of its drive circuit to output high and low under various load conditions.
