Questions tagged [instruction-set]
For questions regarding the instruction sets of microprocessors.
87 questions
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Did any processor ISA have a "reversed accumulator" architecture?
Simple processors (microprocessors or otherwise, especially older ones) often have an accumulator register that serves as the implicit source/destination register for instructions. In a microprocessor ...
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Did any processor (ISA) ever exist which didn't have well-defined signed overflow?
The C language always labelled signed overflow/underflow of integers "undefined behavior". I usually argue and say that this is an artificial construct created by C. On the assembler level ...
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How to implement a bitwise AND operation in PDP-11 assembly?
PDP11 doesn't provide an AND instruction – just XOR. What is the usual PDP-11 assembly code to implement an AND, i.e. the PDP-11 assembler equivalent of the C code a & b please?
What I'm looking ...
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Why is the destination register encoded in a different place for MUL(S) on ARM?
This question is about the instructions MUL and MULS (hereinafter, just Multiply), which were introduced with the ARM2, and the encoding of the register operands. In this context, Rd refers to the ...
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Did PCs ever actually have a halt instruction?
In the x86 computer architecture, HLT (halt) pauses the CPU until the next hardware interrupt occurs. So HLT doesn't really halt the computer; it pauses it.
Was there ever a true x86 (or even /64) ...
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What is the origin of the many extra mnemonics in Manx Software Systems’ 8086 assembler?
While I was viewing the file AS.EXE, I stumbled upon next list of instruction mnemonics for the 8086 processor:
ja jb jc je jg jl in jo jp js jz
aaa daa aad adc add dec bge aam jae jbe lea clc bhi ...
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Garbage collection instruction in i386 – which one and why?
In the paper "Symbolics, Inc.: A failure of heterogeneous engineering" by Alvin Graylin, Kari Anne, Hoier Kjolaas, Jonathan Loflin and Jimmie D. Walker III, there's a mention that:
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Is there a comprehensive description of the Electrologica X1/X8 instruction set?
The Electrologica X1, and its successor X8 were word-based computers with 27-bit words, using 1's complement binary arithmetic. In an article comparing Algol-60 compilers for X1 and X8 F. E. J. ...
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Why does the 68000 have Immediate addressing modes for byte-width instructions?
Motorola's 68000 has an instruction like ori.b #immediate, d0. This particular instruction is encoded as all zeroes, followed by a full 16 bits encoding an 8-bit immediate value. The instruction word ...
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What was the 6-bit length instruction(s) in the Intel iAPX 432?
The iAPX 432 was arguably the most complex processor architecture ever and a commercial failure for Intel. It was a stack machine with no visible general-purpose registers. It had hardware support ...
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Did any processor implement an integer square root instruction?
Has any processor ever implemented an integer square root instruction? Obviously, floating-point square root instructions are quite common, but I've never seen one specifically for integers.
One close ...
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What aspects of microprocessor ISAs have been patented?
A key objective of RISC-V was that every aspect of the ISA must be based on an expired patent. It was felt that this is the only truly reliable defense against patent lawsuits.
It is surprising that ...
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Why does the Z22 have a read-only shadow of the return address location?
For some context to this question see Raffzahn's excellent question and answer How were Zuse Z22 Instructions Encoded?.
The Z22 treats the first few locations of its address space in a particular way:...
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Original instruction set for the first ARM processor
I'm studying ISAs and would really like to see the very first ISA that Sophie Wilson chose/put together when designing the very first ARM CPU while at Acorn Computers around 1983 or so.
From what I ...
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IMPI Instruction set: is there any reference?
I've had an IBM 9404 B-10 for some time and I'm curious about its assembly language. I'm fully aware the AS lines were designed with portability in mind as much IBM didn't seem to provide assembly ...
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